TimeQuest Timing Analyzer report for Equalizer
Fri Jun 15 22:32:01 2012
Quartus II 64-Bit Version 11.1 Build 173 11/01/2011 SJ Full Version


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. TimeQuest Timing Analyzer Summary
  3. Parallel Compilation
  4. Clocks
  5. Slow Model Fmax Summary
  6. Slow Model Setup Summary
  7. Slow Model Hold Summary
  8. Slow Model Recovery Summary
  9. Slow Model Removal Summary
 10. Slow Model Minimum Pulse Width Summary
 11. Slow Model Setup: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'
 12. Slow Model Setup: 'AUD_BCLK'
 13. Slow Model Setup: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 14. Slow Model Setup: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'
 15. Slow Model Setup: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'
 16. Slow Model Setup: 'CLOCK_27'
 17. Slow Model Setup: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'
 18. Slow Model Hold: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'
 19. Slow Model Hold: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'
 20. Slow Model Hold: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'
 21. Slow Model Hold: 'AUD_BCLK'
 22. Slow Model Hold: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 23. Slow Model Hold: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'
 24. Slow Model Hold: 'CLOCK_27'
 25. Slow Model Recovery: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 26. Slow Model Removal: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 27. Slow Model Minimum Pulse Width: 'AUD_BCLK'
 28. Slow Model Minimum Pulse Width: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'
 29. Slow Model Minimum Pulse Width: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'
 30. Slow Model Minimum Pulse Width: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'
 31. Slow Model Minimum Pulse Width: 'CLOCK_50'
 32. Slow Model Minimum Pulse Width: 'CLOCK_27'
 33. Slow Model Minimum Pulse Width: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 34. Slow Model Minimum Pulse Width: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'
 35. Setup Times
 36. Hold Times
 37. Clock to Output Times
 38. Minimum Clock to Output Times
 39. Propagation Delay
 40. Minimum Propagation Delay
 41. Output Enable Times
 42. Minimum Output Enable Times
 43. Output Disable Times
 44. Minimum Output Disable Times
 45. Fast Model Setup Summary
 46. Fast Model Hold Summary
 47. Fast Model Recovery Summary
 48. Fast Model Removal Summary
 49. Fast Model Minimum Pulse Width Summary
 50. Fast Model Setup: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'
 51. Fast Model Setup: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 52. Fast Model Setup: 'AUD_BCLK'
 53. Fast Model Setup: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'
 54. Fast Model Setup: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'
 55. Fast Model Setup: 'CLOCK_27'
 56. Fast Model Setup: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'
 57. Fast Model Hold: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'
 58. Fast Model Hold: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'
 59. Fast Model Hold: 'AUD_BCLK'
 60. Fast Model Hold: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'
 61. Fast Model Hold: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 62. Fast Model Hold: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'
 63. Fast Model Hold: 'CLOCK_27'
 64. Fast Model Recovery: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 65. Fast Model Removal: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 66. Fast Model Minimum Pulse Width: 'AUD_BCLK'
 67. Fast Model Minimum Pulse Width: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'
 68. Fast Model Minimum Pulse Width: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'
 69. Fast Model Minimum Pulse Width: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'
 70. Fast Model Minimum Pulse Width: 'CLOCK_50'
 71. Fast Model Minimum Pulse Width: 'CLOCK_27'
 72. Fast Model Minimum Pulse Width: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 73. Fast Model Minimum Pulse Width: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'
 74. Setup Times
 75. Hold Times
 76. Clock to Output Times
 77. Minimum Clock to Output Times
 78. Propagation Delay
 79. Minimum Propagation Delay
 80. Output Enable Times
 81. Minimum Output Enable Times
 82. Output Disable Times
 83. Minimum Output Disable Times
 84. Multicorner Timing Analysis Summary
 85. Setup Times
 86. Hold Times
 87. Clock to Output Times
 88. Minimum Clock to Output Times
 89. Progagation Delay
 90. Minimum Progagation Delay
 91. Setup Transfers
 92. Hold Transfers
 93. Recovery Transfers
 94. Removal Transfers
 95. Report TCCS
 96. Report RSKM
 97. Unconstrained Paths
 98. TimeQuest Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2011 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+------------------------------------------------------------------------+
; TimeQuest Timing Analyzer Summary                                      ;
+--------------------+---------------------------------------------------+
; Quartus II Version ; Version 11.1 Build 173 11/01/2011 SJ Full Version ;
; Revision Name      ; Equalizer                                         ;
; Device Family      ; Cyclone II                                        ;
; Device Name        ; EP2C35F672C6                                      ;
; Timing Models      ; Final                                             ;
; Delay Model        ; Combined                                          ;
; Rise/Fall Delays   ; Unavailable                                       ;
+--------------------+---------------------------------------------------+


Parallel compilation was disabled, but you have multiple processors available. Enable parallel compilation to reduce compilation time.
+-------------------------------------+
; Parallel Compilation                ;
+----------------------------+--------+
; Processors                 ; Number ;
+----------------------------+--------+
; Number detected on machine ; 2      ;
; Maximum allowed            ; 1      ;
+----------------------------+--------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clocks                                                                                                                                                                                                                                                                                                                                 ;
+--------------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+----------+-------------------------------------------------------+------------------------------------------------------------+
; Clock Name                                             ; Type      ; Period  ; Frequency  ; Rise  ; Fall   ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master   ; Source                                                ; Targets                                                    ;
+--------------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+----------+-------------------------------------------------------+------------------------------------------------------------+
; AUD_BCLK                                               ; Base      ; 1.000   ; 1000.0 MHz ; 0.000 ; 0.500  ;            ;           ;             ;       ;        ;           ;            ;          ;          ;                                                       ; { AUD_BCLK }                                               ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Base      ; 1.000   ; 1000.0 MHz ; 0.000 ; 0.500  ;            ;           ;             ;       ;        ;           ;            ;          ;          ;                                                       ; { audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql } ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Base      ; 1.000   ; 1000.0 MHz ; 0.000 ; 0.500  ;            ;           ;             ;       ;        ;           ;            ;          ;          ;                                                       ; { audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr } ;
; CLOCK_27                                               ; Base      ; 37.037  ; 27.0 MHz   ; 0.000 ; 18.518 ;            ;           ;             ;       ;        ;           ;            ;          ;          ;                                                       ; { CLOCK_27 }                                               ;
; CLOCK_50                                               ; Base      ; 20.000  ; 50.0 MHz   ; 0.000 ; 10.000 ;            ;           ;             ;       ;        ;           ;            ;          ;          ;                                                       ; { CLOCK_50 }                                               ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; Generated ; 20.000  ; 50.0 MHz   ; 0.000 ; 10.000 ; 50.00      ; 1         ; 1           ;       ;        ;           ;            ; false    ; CLOCK_50 ; clock_generator_1|pll_1|altpll_component|pll|inclk[0] ; { clock_generator_1|pll_1|altpll_component|pll|clk[0] }    ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; Generated ; 100.000 ; 10.0 MHz   ; 0.000 ; 50.000 ; 50.00      ; 5         ; 1           ;       ;        ;           ;            ; false    ; CLOCK_50 ; clock_generator_1|pll_1|altpll_component|pll|inclk[0] ; { clock_generator_1|pll_1|altpll_component|pll|clk[1] }    ;
; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; Generated ; 83.333  ; 12.0 MHz   ; 0.000 ; 41.666 ; 50.00      ; 9         ; 4           ;       ;        ;           ;            ; false    ; CLOCK_27 ; clock_generator_1|pll_2|altpll_component|pll|inclk[0] ; { clock_generator_1|pll_2|altpll_component|pll|clk[1] }    ;
+--------------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+----------+-------------------------------------------------------+------------------------------------------------------------+


+-------------------------------------------------------------------------------------------+
; Slow Model Fmax Summary                                                                   ;
+------------+-----------------+-----------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                          ; Note ;
+------------+-----------------+-----------------------------------------------------+------+
; 48.84 MHz  ; 48.84 MHz       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;      ;
; 158.7 MHz  ; 158.7 MHz       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;      ;
; 206.74 MHz ; 206.74 MHz      ; CLOCK_27                                            ;      ;
; 294.29 MHz ; 294.29 MHz      ; AUD_BCLK                                            ;      ;
; 410.85 MHz ; 410.85 MHz      ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ;      ;
+------------+-----------------+-----------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


+---------------------------------------------------------------------------------+
; Slow Model Setup Summary                                                        ;
+--------------------------------------------------------+--------+---------------+
; Clock                                                  ; Slack  ; End Point TNS ;
+--------------------------------------------------------+--------+---------------+
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; -5.322 ; -1154.566     ;
; AUD_BCLK                                               ; -2.398 ; -257.223      ;
; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; -2.033 ; -39.410       ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 2.131  ; 0.000         ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 2.660  ; 0.000         ;
; CLOCK_27                                               ; 32.200 ; 0.000         ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 97.566 ; 0.000         ;
+--------------------------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------+
; Slow Model Hold Summary                                                         ;
+--------------------------------------------------------+--------+---------------+
; Clock                                                  ; Slack  ; End Point TNS ;
+--------------------------------------------------------+--------+---------------+
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; -2.295 ; -51.303       ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; -2.109 ; -36.646       ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; -0.158 ; -0.315        ;
; AUD_BCLK                                               ; -0.105 ; -0.688        ;
; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 0.391  ; 0.000         ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 0.675  ; 0.000         ;
; CLOCK_27                                               ; 1.059  ; 0.000         ;
+--------------------------------------------------------+--------+---------------+


+-----------------------------------------------------------------------------+
; Slow Model Recovery Summary                                                 ;
+-----------------------------------------------------+-------+---------------+
; Clock                                               ; Slack ; End Point TNS ;
+-----------------------------------------------------+-------+---------------+
; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 3.745 ; 0.000         ;
+-----------------------------------------------------+-------+---------------+


+-----------------------------------------------------------------------------+
; Slow Model Removal Summary                                                  ;
+-----------------------------------------------------+-------+---------------+
; Clock                                               ; Slack ; End Point TNS ;
+-----------------------------------------------------+-------+---------------+
; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 5.033 ; 0.000         ;
+-----------------------------------------------------+-------+---------------+


+---------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width Summary                                          ;
+--------------------------------------------------------+--------+---------------+
; Clock                                                  ; Slack  ; End Point TNS ;
+--------------------------------------------------------+--------+---------------+
; AUD_BCLK                                               ; -1.222 ; -142.222      ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; -0.500 ; -24.000       ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; -0.500 ; -24.000       ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 8.077  ; 0.000         ;
; CLOCK_50                                               ; 10.000 ; 0.000         ;
; CLOCK_27                                               ; 17.518 ; 0.000         ;
; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 40.666 ; 0.000         ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 49.000 ; 0.000         ;
+--------------------------------------------------------+--------+---------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Setup: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'                                                                                                                                                    ;
+--------+-----------------------------------------+-----------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                               ; To Node                                                   ; Launch Clock ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------+-----------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; -5.322 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[15]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.358     ; 3.001      ;
; -5.322 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[14]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.358     ; 3.001      ;
; -5.322 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[16]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.358     ; 3.001      ;
; -5.322 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[17]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.358     ; 3.001      ;
; -5.322 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[19]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.358     ; 3.001      ;
; -5.322 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[18]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.358     ; 3.001      ;
; -5.322 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[13]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.358     ; 3.001      ;
; -5.322 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[11]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.358     ; 3.001      ;
; -5.322 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[12]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.358     ; 3.001      ;
; -5.322 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[10]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.358     ; 3.001      ;
; -5.255 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[1]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.332     ; 2.960      ;
; -5.255 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.332     ; 2.960      ;
; -5.255 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[4]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.332     ; 2.960      ;
; -5.247 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[0]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.331     ; 2.953      ;
; -5.243 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.336     ; 2.944      ;
; -5.243 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[0]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.336     ; 2.944      ;
; -5.243 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[5]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.336     ; 2.944      ;
; -5.243 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[7]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.334     ; 2.946      ;
; -5.243 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.334     ; 2.946      ;
; -5.243 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[4]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.336     ; 2.944      ;
; -5.243 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.334     ; 2.946      ;
; -5.243 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[3]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.334     ; 2.946      ;
; -5.238 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.940      ;
; -5.218 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.337     ; 2.918      ;
; -5.218 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[0]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.337     ; 2.918      ;
; -5.206 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[5]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.339     ; 2.904      ;
; -5.206 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[7]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.339     ; 2.904      ;
; -5.206 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.339     ; 2.904      ;
; -5.206 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[4]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.339     ; 2.904      ;
; -5.206 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.339     ; 2.904      ;
; -5.206 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[3]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.339     ; 2.904      ;
; -5.205 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[7]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.331     ; 2.911      ;
; -5.205 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.331     ; 2.911      ;
; -5.205 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[2]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.331     ; 2.911      ;
; -5.205 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.331     ; 2.911      ;
; -5.198 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f9_db[1]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.333     ; 2.902      ;
; -5.184 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f12_db[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.328     ; 2.893      ;
; -5.184 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f12_db[0]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.328     ; 2.893      ;
; -5.162 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[1]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.351     ; 2.848      ;
; -5.162 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.341     ; 2.858      ;
; -5.159 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[2]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.351     ; 2.845      ;
; -5.156 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[7]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.351     ; 2.842      ;
; -5.156 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.354     ; 2.839      ;
; -5.156 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[0]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.354     ; 2.839      ;
; -5.156 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[5]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.351     ; 2.842      ;
; -5.156 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[5]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.354     ; 2.839      ;
; -5.156 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[7]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.354     ; 2.839      ;
; -5.156 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.354     ; 2.839      ;
; -5.156 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.351     ; 2.842      ;
; -5.156 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[4]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.354     ; 2.839      ;
; -5.156 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.351     ; 2.842      ;
; -5.156 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.354     ; 2.839      ;
; -5.156 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[3]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.351     ; 2.842      ;
; -5.156 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[3]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.354     ; 2.839      ;
; -5.154 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[22] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.856      ;
; -5.154 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[21] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.856      ;
; -5.154 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[27] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.856      ;
; -5.154 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[20] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.856      ;
; -5.154 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[14] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.856      ;
; -5.154 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[15] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.856      ;
; -5.154 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[26] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.856      ;
; -5.154 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[25] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.856      ;
; -5.154 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[24] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.856      ;
; -5.154 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[23] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.856      ;
; -5.154 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[19] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.856      ;
; -5.154 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[18] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.856      ;
; -5.154 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[16] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.856      ;
; -5.154 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[17] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.856      ;
; -5.151 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[1]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.337     ; 2.851      ;
; -5.151 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.337     ; 2.851      ;
; -5.151 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[4]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.337     ; 2.851      ;
; -5.143 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[0]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.349     ; 2.831      ;
; -5.143 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[4]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.349     ; 2.831      ;
; -5.143 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.349     ; 2.831      ;
; -5.099 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f5_db[1]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.801      ;
; -5.099 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f5_db[0]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.801      ;
; -5.099 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f5_db[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.801      ;
; -5.099 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f5_db[4]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.801      ;
; -5.097 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[0]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 2.799      ;
; -5.053 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[7]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.367     ; 2.723      ;
; -5.053 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[8]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.367     ; 2.723      ;
; -5.053 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.367     ; 2.723      ;
; -5.053 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[9]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.367     ; 2.723      ;
; -5.053 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.367     ; 2.723      ;
; -5.053 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.367     ; 2.723      ;
; -5.053 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[4]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.367     ; 2.723      ;
; -5.053 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[2]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.367     ; 2.723      ;
; -5.053 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[1]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.367     ; 2.723      ;
; -5.053 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[0]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.367     ; 2.723      ;
; -5.050 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|output[8]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.363     ; 2.724      ;
; -5.050 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|output[4]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.363     ; 2.724      ;
; -5.050 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|output[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.363     ; 2.724      ;
; -5.028 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[2]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.346     ; 2.719      ;
; -5.028 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.346     ; 2.719      ;
; -5.019 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[0]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.347     ; 2.709      ;
; -5.007 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[3]      ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.365     ; 2.679      ;
; -5.007 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|output[0]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.365     ; 2.679      ;
; -5.007 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|output[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.365     ; 2.679      ;
; -5.007 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|output[3]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.365     ; 2.679      ;
; -5.001 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f1_db[0]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.333     ; 2.705      ;
+--------+-----------------------------------------+-----------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Setup: 'AUD_BCLK'                                                                                                                                                                                                                                                       ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                          ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
; -2.398 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[4] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.434      ;
; -2.327 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.363      ;
; -2.256 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[2] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.292      ;
; -2.185 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[1] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.221      ;
; -2.140 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[4] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.176      ;
; -2.117 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|dacdat                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.208      ; 3.361      ;
; -2.104 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[23]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.160      ; 3.300      ;
; -2.104 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[22]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.160      ; 3.300      ;
; -2.104 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[21]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.160      ; 3.300      ;
; -2.104 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[20]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.160      ; 3.300      ;
; -2.104 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[19]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.160      ; 3.300      ;
; -2.104 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[18]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.160      ; 3.300      ;
; -2.104 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[9]           ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.160      ; 3.300      ;
; -2.104 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[8]           ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.160      ; 3.300      ;
; -2.101 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[7]           ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.159      ; 3.296      ;
; -2.101 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[6]           ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.159      ; 3.296      ;
; -2.101 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[5]           ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.159      ; 3.296      ;
; -2.101 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[4]           ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.159      ; 3.296      ;
; -2.101 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[3]           ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.159      ; 3.296      ;
; -2.101 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[2]           ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.159      ; 3.296      ;
; -2.101 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[1]           ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.159      ; 3.296      ;
; -2.069 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.105      ;
; -2.046 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[7]           ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.245      ; 3.327      ;
; -2.046 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[6]           ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.245      ; 3.327      ;
; -2.046 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[5]           ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.245      ; 3.327      ;
; -2.046 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[4]           ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.245      ; 3.327      ;
; -2.046 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[3]           ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.245      ; 3.327      ;
; -2.046 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[2]           ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.245      ; 3.327      ;
; -2.046 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[1]           ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.245      ; 3.327      ;
; -2.036 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.800      ;
; -2.036 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.800      ;
; -2.036 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.800      ;
; -2.036 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.800      ;
; -2.036 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.800      ;
; -2.036 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.800      ;
; -2.036 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.800      ;
; -2.036 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.800      ;
; -2.036 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.800      ;
; -2.036 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.800      ;
; -2.036 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.800      ;
; -2.036 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.800      ;
; -2.036 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.800      ;
; -2.036 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[14]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.800      ;
; -2.036 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[15]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.800      ;
; -2.036 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.800      ;
; -2.002 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[2] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[4] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.038      ;
; -2.001 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[23]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.247      ; 3.284      ;
; -2.001 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[22]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.247      ; 3.284      ;
; -2.001 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[21]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.247      ; 3.284      ;
; -2.001 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[20]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.247      ; 3.284      ;
; -2.001 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[19]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.247      ; 3.284      ;
; -2.001 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[18]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.247      ; 3.284      ;
; -2.001 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[17]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.247      ; 3.284      ;
; -2.001 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[8]           ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.247      ; 3.284      ;
; -1.998 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[3]  ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; -0.001     ; 3.033      ;
; -1.998 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[4]  ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; -0.001     ; 3.033      ;
; -1.998 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[2]  ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; -0.001     ; 3.033      ;
; -1.998 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[1]  ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; -0.001     ; 3.033      ;
; -1.998 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[0]  ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; -0.001     ; 3.033      ;
; -1.998 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[2] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.034      ;
; -1.994 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[17]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.271      ; 3.301      ;
; -1.994 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[16]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.271      ; 3.301      ;
; -1.994 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[15]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.271      ; 3.301      ;
; -1.994 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[14]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.271      ; 3.301      ;
; -1.994 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[13]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.271      ; 3.301      ;
; -1.994 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[12]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.271      ; 3.301      ;
; -1.994 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[11]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.271      ; 3.301      ;
; -1.994 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[10]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.271      ; 3.301      ;
; -1.990 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.026      ;
; -1.985 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[16]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.252      ; 3.273      ;
; -1.985 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[15]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.252      ; 3.273      ;
; -1.985 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[14]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.252      ; 3.273      ;
; -1.985 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[13]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.252      ; 3.273      ;
; -1.985 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[12]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.252      ; 3.273      ;
; -1.985 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[11]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.252      ; 3.273      ;
; -1.985 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[10]          ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.252      ; 3.273      ;
; -1.985 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[9]           ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.252      ; 3.273      ;
; -1.931 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[2] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 2.967      ;
; -1.927 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[1] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 2.963      ;
; -1.919 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 2.955      ;
; -1.910 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.674      ;
; -1.910 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.674      ;
; -1.910 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.674      ;
; -1.910 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.674      ;
; -1.910 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.674      ;
; -1.910 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.674      ;
; -1.910 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.674      ;
; -1.910 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.674      ;
; -1.910 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.674      ;
; -1.910 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.674      ;
; -1.910 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.674      ;
; -1.910 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.674      ;
; -1.910 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.674      ;
; -1.910 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[14]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.674      ;
; -1.910 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[15]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.674      ;
; -1.910 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.728      ; 3.674      ;
; -1.901 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[1] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[4] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 2.937      ;
; -1.860 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[2] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[2] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 2.896      ;
; -1.859 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|dacdat                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.208      ; 3.103      ;
; -1.853 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 2.889      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Setup: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                                                                                                                                              ;
+--------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                                  ; To Node                                                                   ; Launch Clock                                        ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; -2.033 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.051     ; 2.019      ;
; -2.033 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.051     ; 2.019      ;
; -1.984 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.044     ; 1.977      ;
; -1.982 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.044     ; 1.975      ;
; -1.821 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.050     ; 1.808      ;
; -1.821 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.050     ; 1.808      ;
; -1.821 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.050     ; 1.808      ;
; -1.821 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.050     ; 1.808      ;
; -1.722 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.044     ; 1.715      ;
; -1.716 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.044     ; 1.709      ;
; -1.716 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.044     ; 1.709      ;
; -1.703 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.043     ; 1.697      ;
; -1.703 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.043     ; 1.697      ;
; -1.579 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.044     ; 1.572      ;
; -1.421 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.050     ; 1.408      ;
; -1.421 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.050     ; 1.408      ;
; -1.421 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.050     ; 1.408      ;
; -1.421 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.050     ; 1.408      ;
; -1.421 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.050     ; 1.408      ;
; -1.421 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.050     ; 1.408      ;
; -1.421 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.050     ; 1.408      ;
; -1.421 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.050     ; 1.408      ;
; -1.295 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.043     ; 1.289      ;
; -1.292 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.043     ; 1.286      ;
; 3.163  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.400     ; 3.732      ;
; 3.163  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.400     ; 3.732      ;
; 3.375  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.399     ; 3.521      ;
; 3.375  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.399     ; 3.521      ;
; 3.375  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.399     ; 3.521      ;
; 3.375  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.399     ; 3.521      ;
; 77.032 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.007      ; 6.344      ;
; 77.288 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.007      ; 6.088      ;
; 77.415 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.007      ; 5.961      ;
; 77.631 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.008      ; 5.746      ;
; 77.701 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.008      ; 5.676      ;
; 77.926 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.007      ; 5.450      ;
; 80.150 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 3.219      ;
; 80.181 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 3.189      ;
; 80.716 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 2.653      ;
; 81.073 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 2.295      ;
; 81.073 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 2.295      ;
; 81.079 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 2.289      ;
; 81.079 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 2.289      ;
; 81.133 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 2.236      ;
; 81.236 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 2.132      ;
; 81.236 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 2.132      ;
; 81.256 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.007      ; 2.120      ;
; 81.366 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende            ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 2.004      ;
; 81.379 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 1.991      ;
; 81.390 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 1.980      ;
; 81.421 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.948      ;
; 81.438 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 1.932      ;
; 81.461 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.908      ;
; 81.463 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.906      ;
; 81.475 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.007      ; 1.901      ;
; 81.522 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 1.846      ;
; 81.524 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 1.844      ;
; 81.557 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 1.813      ;
; 81.585 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.784      ;
; 81.585 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.784      ;
; 81.587 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.782      ;
; 81.595 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.774      ;
; 81.596 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.773      ;
; 81.616 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.007      ; 1.760      ;
; 81.672 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 1.698      ;
; 81.674 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 1.696      ;
; 81.679 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 1.691      ;
; 81.691 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.007      ; 1.685      ;
; 81.729 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.007      ; 1.647      ;
; 81.769 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.600      ;
; 81.789 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.006     ; 1.574      ;
; 81.791 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.006     ; 1.572      ;
; 81.811 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 1.559      ;
; 81.813 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.007      ; 1.563      ;
; 81.813 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 1.557      ;
; 81.854 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.515      ;
; 81.887 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.482      ;
; 81.889 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.480      ;
; 81.893 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.476      ;
; 81.895 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.474      ;
; 81.896 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.473      ;
; 81.966 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.006     ; 1.397      ;
; 81.976 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 1.399      ;
; 81.982 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.007      ; 1.394      ;
; 81.989 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.380      ;
; 82.025 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 1.343      ;
; 82.083 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.286      ;
; 82.084 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 1.286      ;
; 82.098 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.271      ;
; 82.098 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 1.270      ;
; 82.098 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 1.270      ;
; 82.139 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.230      ;
; 82.141 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.228      ;
; 82.159 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.210      ;
; 82.163 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.206      ;
; 82.196 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.173      ;
; 82.196 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.173      ;
; 82.231 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.138      ;
; 82.239 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.130      ;
; 82.261 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.108      ;
+--------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Setup: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'                                                                                                                                                                                                                                ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                 ; To Node                                                                       ; Launch Clock                                        ; Latch Clock                                            ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; 2.131 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[7]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[7]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.776      ; 1.681      ;
; 2.139 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[9]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[9]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.775      ; 1.672      ;
; 2.140 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[22] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[22] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.776      ; 1.672      ;
; 2.146 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[21] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[21] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.776      ; 1.666      ;
; 2.147 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[8]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[8]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.775      ; 1.664      ;
; 2.208 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[18] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[18] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.776      ; 1.604      ;
; 2.214 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[4]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.764      ; 1.586      ;
; 2.254 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[20] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[20] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.776      ; 1.558      ;
; 2.263 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[12] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[12] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.775      ; 1.548      ;
; 2.270 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[17] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[17] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.776      ; 1.542      ;
; 2.277 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[15] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[15] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.775      ; 1.534      ;
; 2.279 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[16] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[16] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.776      ; 1.533      ;
; 2.279 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[11] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[11] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.775      ; 1.532      ;
; 2.282 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[10] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[10] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.775      ; 1.529      ;
; 2.285 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[13] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[13] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.775      ; 1.526      ;
; 2.302 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[6]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[6]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.772      ; 1.506      ;
; 2.307 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[5]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[5]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.764      ; 1.493      ;
; 2.322 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[14] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[14] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.767      ; 1.481      ;
; 2.352 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[3]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[3]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.764      ; 1.448      ;
; 2.354 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[2]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[2]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.764      ; 1.446      ;
; 2.355 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[1]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[1]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.764      ; 1.445      ;
; 2.364 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[0]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[0]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.764      ; 1.436      ;
; 2.577 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[19] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[19] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.768      ; 1.227      ;
; 2.879 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[23] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[23] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.769      ; 0.926      ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Setup: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'                                                                                                                                                                                                                                ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                 ; To Node                                                                       ; Launch Clock                                        ; Latch Clock                                            ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; 2.660 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[17] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[17] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.954      ; 1.330      ;
; 2.662 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[21] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[21] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.954      ; 1.328      ;
; 2.664 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[19] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[19] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.954      ; 1.326      ;
; 2.669 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[8]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[8]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.954      ; 1.321      ;
; 2.795 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[23] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[23] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.953      ; 1.194      ;
; 2.797 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[20] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[20] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.954      ; 1.193      ;
; 2.798 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[22] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[22] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.954      ; 1.192      ;
; 2.800 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[18] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[18] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.954      ; 1.190      ;
; 2.805 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[7]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[7]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.958      ; 1.189      ;
; 2.888 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[11] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[11] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.955      ; 1.103      ;
; 2.922 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[16] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[16] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.955      ; 1.069      ;
; 2.993 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[2]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[2]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.957      ; 1.000      ;
; 3.017 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[9]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[9]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.955      ; 0.974      ;
; 3.019 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[14] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[14] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.955      ; 0.972      ;
; 3.019 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[5]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[5]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.957      ; 0.974      ;
; 3.019 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[0]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[0]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.957      ; 0.974      ;
; 3.020 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[15] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[15] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.955      ; 0.971      ;
; 3.020 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[13] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[13] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.955      ; 0.971      ;
; 3.022 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[10] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[10] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.955      ; 0.969      ;
; 3.025 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[1]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[1]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.957      ; 0.968      ;
; 3.027 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[6]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[6]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.957      ; 0.966      ;
; 3.028 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[3]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[3]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.957      ; 0.965      ;
; 3.049 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[12] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[12] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.955      ; 0.942      ;
; 3.065 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[4]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.957      ; 0.928      ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Setup: 'CLOCK_27'                                                                                                                                                             ;
+--------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
; Slack  ; From Node                                           ; To Node                                             ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
; 32.200 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.873      ;
; 32.214 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.859      ;
; 32.214 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.859      ;
; 32.215 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.858      ;
; 32.215 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.858      ;
; 32.216 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.857      ;
; 32.216 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.857      ;
; 32.218 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.855      ;
; 32.218 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.855      ;
; 32.221 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.852      ;
; 32.225 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.848      ;
; 32.225 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[14] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.848      ;
; 32.228 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[13] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.845      ;
; 32.228 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.845      ;
; 32.231 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.007      ; 4.849      ;
; 32.231 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.007      ; 4.849      ;
; 32.233 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.840      ;
; 32.233 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.840      ;
; 32.235 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[17] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.007      ; 4.845      ;
; 32.277 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.006      ; 4.802      ;
; 32.278 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.006      ; 4.801      ;
; 32.415 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 4.659      ;
; 32.451 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.006      ; 4.628      ;
; 32.499 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 4.575      ;
; 32.515 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.002      ; 4.560      ;
; 32.566 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 4.508      ;
; 32.586 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.486      ;
; 32.587 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.485      ;
; 32.591 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.482      ;
; 32.742 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|reset             ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 4.329      ;
; 32.751 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.322      ;
; 32.757 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.316      ;
; 32.793 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 4.278      ;
; 32.806 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 4.268      ;
; 32.815 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.258      ;
; 32.820 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.002      ; 4.255      ;
; 32.856 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.216      ;
; 32.860 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.213      ;
; 32.890 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 4.184      ;
; 32.906 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.002      ; 4.169      ;
; 32.923 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.006      ; 4.156      ;
; 32.946 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[14] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.127      ;
; 32.957 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 4.117      ;
; 32.958 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.115      ;
; 32.959 ; clock_generator:clock_generator_1|start_counter[15] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.114      ;
; 33.006 ; clock_generator:clock_generator_1|start_counter[13] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.067      ;
; 33.039 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.034      ;
; 33.039 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.034      ;
; 33.040 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.033      ;
; 33.040 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.033      ;
; 33.041 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.032      ;
; 33.041 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.032      ;
; 33.043 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.030      ;
; 33.043 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.030      ;
; 33.046 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.027      ;
; 33.050 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.023      ;
; 33.050 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[14] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.023      ;
; 33.053 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[13] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.020      ;
; 33.056 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.007      ; 4.024      ;
; 33.056 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.007      ; 4.024      ;
; 33.058 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.015      ;
; 33.058 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.015      ;
; 33.060 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[17] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.007      ; 4.020      ;
; 33.065 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 4.006      ;
; 33.065 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.006      ; 4.014      ;
; 33.066 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.007      ;
; 33.066 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.007      ;
; 33.067 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.006      ;
; 33.067 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.006      ;
; 33.068 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.005      ;
; 33.068 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.005      ;
; 33.070 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.003      ;
; 33.070 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.003      ;
; 33.073 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.000      ;
; 33.077 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.996      ;
; 33.077 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[14] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.996      ;
; 33.078 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.995      ;
; 33.080 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[13] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.993      ;
; 33.083 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.007      ; 3.997      ;
; 33.083 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.007      ; 3.997      ;
; 33.085 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.988      ;
; 33.085 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.988      ;
; 33.087 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[17] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.007      ; 3.993      ;
; 33.096 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.977      ;
; 33.100 ; clock_generator:clock_generator_1|start_counter[11] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.973      ;
; 33.102 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.006      ; 3.977      ;
; 33.103 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.006      ; 3.976      ;
; 33.127 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.007     ; 3.939      ;
; 33.127 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.007     ; 3.939      ;
; 33.128 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.007     ; 3.938      ;
; 33.128 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.007     ; 3.938      ;
; 33.129 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.007     ; 3.937      ;
; 33.129 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.007     ; 3.937      ;
; 33.129 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.006      ; 3.950      ;
; 33.130 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.006      ; 3.949      ;
; 33.131 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.007     ; 3.935      ;
; 33.131 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.007     ; 3.935      ;
; 33.132 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.006      ; 3.947      ;
; 33.134 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.007     ; 3.932      ;
; 33.138 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.007     ; 3.928      ;
+--------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Setup: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'                                                                                                                                                                                                                                            ;
+--------+-------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                               ; To Node                                                                    ; Launch Clock                                        ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+-------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; 97.566 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.470      ;
; 97.679 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.357      ;
; 97.682 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.354      ;
; 97.707 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.329      ;
; 97.739 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.297      ;
; 97.774 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.262      ;
; 97.961 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.075      ;
; 97.963 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.073      ;
; 98.020 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.016      ;
; 98.029 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.007      ;
; 98.100 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.936      ;
; 98.101 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.935      ;
; 98.142 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.894      ;
; 98.143 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.893      ;
; 98.170 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.866      ;
; 98.171 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.865      ;
; 98.213 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.823      ;
; 98.237 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.799      ;
; 98.241 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.795      ;
; 98.242 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.794      ;
; 98.284 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.752      ;
; 98.308 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.728      ;
; 98.312 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.724      ;
; 98.330 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.706      ;
; 98.347 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.689      ;
; 98.379 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.657      ;
; 98.401 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.635      ;
; 98.418 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.618      ;
; 98.443 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.593      ;
; 98.450 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.586      ;
; 98.465 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.571      ;
; 98.471 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.565      ;
; 98.472 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.564      ;
; 98.489 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.547      ;
; 98.514 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.522      ;
; 98.536 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.500      ;
; 98.538 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.498      ;
; 98.542 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.494      ;
; 98.543 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.493      ;
; 98.550 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.486      ;
; 98.585 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.451      ;
; 98.586 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.450      ;
; 98.591 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.445      ;
; 98.691 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.345      ;
; 98.826 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.210      ;
; 98.921 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.115      ;
; 98.922 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.114      ;
; 98.924 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.112      ;
; 98.928 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.108      ;
; 98.929 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.107      ;
; 98.964 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.072      ;
; 98.968 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.068      ;
; 98.969 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.067      ;
; 99.091 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.945      ;
+--------+-------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Hold: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'                                                                                                                                                                                                                                  ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                 ; To Node                                                                       ; Launch Clock                                        ; Latch Clock                                            ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; -2.295 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[4]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.957      ; 0.928      ;
; -2.279 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[12] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[12] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.955      ; 0.942      ;
; -2.258 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[3]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[3]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.957      ; 0.965      ;
; -2.257 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[6]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[6]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.957      ; 0.966      ;
; -2.255 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[1]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[1]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.957      ; 0.968      ;
; -2.252 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[10] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[10] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.955      ; 0.969      ;
; -2.250 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[15] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[15] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.955      ; 0.971      ;
; -2.250 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[13] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[13] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.955      ; 0.971      ;
; -2.249 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[14] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[14] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.955      ; 0.972      ;
; -2.249 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[5]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[5]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.957      ; 0.974      ;
; -2.249 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[0]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[0]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.957      ; 0.974      ;
; -2.247 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[9]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[9]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.955      ; 0.974      ;
; -2.223 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[2]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[2]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.957      ; 1.000      ;
; -2.152 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[16] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[16] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.955      ; 1.069      ;
; -2.118 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[11] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[11] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.955      ; 1.103      ;
; -2.035 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[7]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[7]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.958      ; 1.189      ;
; -2.030 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[18] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[18] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.954      ; 1.190      ;
; -2.028 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[22] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[22] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.954      ; 1.192      ;
; -2.027 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[20] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[20] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.954      ; 1.193      ;
; -2.025 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[23] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[23] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.953      ; 1.194      ;
; -1.899 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[8]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[8]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.954      ; 1.321      ;
; -1.894 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[19] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[19] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.954      ; 1.326      ;
; -1.892 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[21] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[21] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.954      ; 1.328      ;
; -1.890 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[17] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[17] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.954      ; 1.330      ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Hold: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'                                                                                                                                                                                                                                  ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                 ; To Node                                                                       ; Launch Clock                                        ; Latch Clock                                            ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; -2.109 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[23] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[23] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.769      ; 0.926      ;
; -1.807 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[19] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[19] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.768      ; 1.227      ;
; -1.594 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[0]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[0]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.764      ; 1.436      ;
; -1.585 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[1]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[1]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.764      ; 1.445      ;
; -1.584 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[2]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[2]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.764      ; 1.446      ;
; -1.582 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[3]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[3]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.764      ; 1.448      ;
; -1.552 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[14] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[14] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.767      ; 1.481      ;
; -1.537 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[5]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[5]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.764      ; 1.493      ;
; -1.532 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[6]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[6]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.772      ; 1.506      ;
; -1.515 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[13] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[13] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.775      ; 1.526      ;
; -1.512 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[10] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[10] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.775      ; 1.529      ;
; -1.509 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[16] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[16] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.776      ; 1.533      ;
; -1.509 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[11] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[11] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.775      ; 1.532      ;
; -1.507 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[15] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[15] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.775      ; 1.534      ;
; -1.500 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[17] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[17] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.776      ; 1.542      ;
; -1.493 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[12] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[12] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.775      ; 1.548      ;
; -1.484 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[20] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[20] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.776      ; 1.558      ;
; -1.444 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[4]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.764      ; 1.586      ;
; -1.438 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[18] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[18] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.776      ; 1.604      ;
; -1.377 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[8]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[8]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.775      ; 1.664      ;
; -1.376 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[21] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[21] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.776      ; 1.666      ;
; -1.370 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[22] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[22] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.776      ; 1.672      ;
; -1.369 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[9]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[9]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.775      ; 1.672      ;
; -1.361 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[7]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[7]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.776      ; 1.681      ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Hold: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'                                                                                                                                                                                                                                             ;
+--------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+--------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                               ; To Node                                                                 ; Launch Clock                                           ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+--------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; -0.158 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.299      ; 0.657      ;
; -0.157 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.298      ; 0.657      ;
; 0.342  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; -0.500       ; 0.299      ; 0.657      ;
; 0.343  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; -0.500       ; 0.298      ; 0.657      ;
; 0.391  ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[4]                    ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[4]                    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[2]                    ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[2]                    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[0]                    ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[0]                    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[3]                    ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[3]                    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[1]                    ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[1]                    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[0]                      ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[0]                      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[2]                      ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[2]                      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[1]                      ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[1]                      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|lcd_controller:lcd_controller_1|start                         ; MMI:MMI_1|lcd_controller:lcd_controller_1|start                         ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[3]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[3]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[0]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[0]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[2]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[2]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[7]      ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[7]      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[23]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[23]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[7]       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[7]       ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[22]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[22]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[7] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[7] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[0] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[1] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[2] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[2] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[3] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[3] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[1] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[2] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[2] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[4] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[4] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[5] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[5] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[6] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[6] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[21]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[21]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[20]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[20]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[54]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[54]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[56]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[56]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[60]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[60]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[54]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[54]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[58]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[58]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[59]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[59]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[17]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[17]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[20]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[20]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[20]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[20]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[21]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[21]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[21]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[21]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[22]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[22]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[22]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[22]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[23]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[23]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[23]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[23]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[20]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[20]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[20]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[20]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[20]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[20]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[20]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[20]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[21]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[21]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[21]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[21]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[21]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[21]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[21]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[21]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[22]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[22]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[22]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[22]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[22]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[22]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[22]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[22]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[23]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[23]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[23]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[23]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[23]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[23]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[23]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[23]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[16]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[16]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_12[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_12[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_10[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_10[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_14[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_14[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_13[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_13[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_7[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_7[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_5[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_5[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_12[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_12[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_11[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_11[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_3[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_3[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_4[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_4[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_10[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_10[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_12[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_12[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_11[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_11[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_12[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_12[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_4[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_4[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_3[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_3[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_7[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_7[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_5[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_5[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_14[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_14[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_13[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_13[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_12[20]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_12[20]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_10[20]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_10[20]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
+--------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+--------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Hold: 'AUD_BCLK'                                                                                                                                                                                                                                                        ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                          ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
; -0.105 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[12]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.693      ; 0.854      ;
; -0.104 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[7]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.693      ; 0.855      ;
; -0.099 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[10]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.693      ; 0.860      ;
; -0.097 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[9]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.693      ; 0.862      ;
; -0.095 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[6]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.693      ; 0.864      ;
; -0.094 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.693      ; 0.865      ;
; -0.094 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.693      ; 0.865      ;
; 0.185  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.728      ; 1.179      ;
; 0.186  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.728      ; 1.180      ;
; 0.191  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.728      ; 1.185      ;
; 0.191  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.728      ; 1.185      ;
; 0.196  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.728      ; 1.190      ;
; 0.196  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.728      ; 1.190      ;
; 0.204  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.728      ; 1.198      ;
; 0.204  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.728      ; 1.198      ;
; 0.207  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.728      ; 1.201      ;
; 0.208  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.728      ; 1.202      ;
; 0.334  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[13]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.693      ; 1.293      ;
; 0.368  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[22]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.396      ; 1.030      ;
; 0.369  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[23]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.396      ; 1.031      ;
; 0.372  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[0]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.396      ; 1.034      ;
; 0.391  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enl                          ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enl                          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enr                          ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enr                          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.657      ;
; 0.441  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[13]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.576      ; 1.283      ;
; 0.443  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[10]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.576      ; 1.285      ;
; 0.459  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[15]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.728      ; 1.453      ;
; 0.473  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.728      ; 1.467      ;
; 0.478  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.728      ; 1.472      ;
; 0.478  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[14]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.728      ; 1.472      ;
; 0.480  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.728      ; 1.474      ;
; 0.481  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.728      ; 1.475      ;
; 0.520  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[6]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[7]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.786      ;
; 0.522  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[20]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.574      ; 1.362      ;
; 0.522  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[5]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[6]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.788      ;
; 0.527  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[21]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.574      ; 1.367      ;
; 0.593  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[11]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.576      ; 1.435      ;
; 0.593  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[12]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.576      ; 1.435      ;
; 0.597  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enr                          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.863      ;
; 0.610  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[4]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.425      ; 1.301      ;
; 0.613  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[3]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.425      ; 1.304      ;
; 0.615  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[1]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.425      ; 1.306      ;
; 0.615  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[5]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.425      ; 1.306      ;
; 0.622  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[2]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.670      ; 1.558      ;
; 0.635  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[5]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.670      ; 1.571      ;
; 0.646  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[17]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[18]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.912      ;
; 0.646  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[1]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[2]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.912      ;
; 0.649  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[2]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[3]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.915      ;
; 0.650  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[3]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[4]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.916      ;
; 0.662  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[22]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.396      ; 1.324      ;
; 0.663  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[23]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.396      ; 1.325      ;
; 0.667  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[0]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.396      ; 1.329      ;
; 0.669  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[14]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[15]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.935      ;
; 0.714  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[4] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[4] ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.980      ;
; 0.717  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enl                          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.983      ;
; 0.719  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[14]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.574      ; 1.559      ;
; 0.749  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[9]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.576      ; 1.591      ;
; 0.750  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[9]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.576      ; 1.592      ;
; 0.751  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[10]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.576      ; 1.593      ;
; 0.755  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[13]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.576      ; 1.597      ;
; 0.755  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[12]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.576      ; 1.597      ;
; 0.756  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[11]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.576      ; 1.598      ;
; 0.792  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[21]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[22]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.058      ;
; 0.794  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[20]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[21]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.060      ;
; 0.794  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[13]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[14]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.060      ;
; 0.794  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[1]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[2]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.060      ;
; 0.795  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.061      ;
; 0.795  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[1]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[1]  ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.061      ;
; 0.795  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[6]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[7]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.061      ;
; 0.798  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]                      ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.064      ;
; 0.798  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[21]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[22]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.064      ;
; 0.798  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[10]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[11]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.064      ;
; 0.798  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[5]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[6]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.064      ;
; 0.799  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.065      ;
; 0.799  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[15]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[16]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.065      ;
; 0.799  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[12]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[13]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.065      ;
; 0.799  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[10]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[11]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.065      ;
; 0.799  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[9]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[10]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.065      ;
; 0.799  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[8]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[9]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.065      ;
; 0.800  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[22]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[23]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.066      ;
; 0.800  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[11]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[12]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.066      ;
; 0.801  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[4]  ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.067      ;
; 0.801  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[1] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[1] ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.067      ;
; 0.801  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[20]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[21]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.067      ;
; 0.801  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[18]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[19]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.067      ;
; 0.801  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[12]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[13]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.067      ;
; 0.801  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[11]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[12]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.067      ;
; 0.802  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]              ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.068      ;
; 0.802  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.068      ;
; 0.809  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.075      ;
; 0.824  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[17]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.574      ; 1.664      ;
; 0.824  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[4]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[5]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.090      ;
; 0.826  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[19]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.574      ; 1.666      ;
; 0.827  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[18]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.574      ; 1.667      ;
; 0.828  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[2]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[2]              ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.094      ;
; 0.828  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[18]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[19]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.094      ;
; 0.828  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[14]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[15]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.094      ;
; 0.830  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[19]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[20]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.096      ;
; 0.830  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[15]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[16]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.096      ;
; 0.831  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[15]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.574      ; 1.671      ;
; 0.831  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[0]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[0]  ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.097      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Hold: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                                                                                                                                              ;
+-------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                  ; To Node                                                                   ; Launch Clock                                        ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+-------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende            ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.536 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.802      ;
; 0.563 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.829      ;
; 0.565 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.831      ;
; 0.568 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.834      ;
; 0.568 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.834      ;
; 0.625 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.891      ;
; 0.665 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.931      ;
; 0.674 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.940      ;
; 0.676 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.942      ;
; 0.679 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.945      ;
; 0.683 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.949      ;
; 0.688 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.954      ;
; 0.807 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.073      ;
; 0.815 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.081      ;
; 0.838 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.104      ;
; 0.840 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.106      ;
; 0.842 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.108      ;
; 0.864 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.130      ;
; 0.872 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.138      ;
; 0.907 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.173      ;
; 0.907 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.173      ;
; 0.940 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.206      ;
; 0.943 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.001     ; 1.208      ;
; 0.943 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.001     ; 1.208      ;
; 0.962 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.228      ;
; 0.964 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.230      ;
; 1.005 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.001     ; 1.270      ;
; 1.005 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.001     ; 1.270      ;
; 1.005 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.271      ;
; 1.019 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 1.286      ;
; 1.020 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.286      ;
; 1.063 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.043     ; 1.286      ;
; 1.066 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.043     ; 1.289      ;
; 1.078 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.001     ; 1.343      ;
; 1.114 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.380      ;
; 1.121 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.007      ; 1.394      ;
; 1.127 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.006      ; 1.399      ;
; 1.137 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.006     ; 1.397      ;
; 1.192 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.050     ; 1.408      ;
; 1.192 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.050     ; 1.408      ;
; 1.192 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.050     ; 1.408      ;
; 1.192 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.050     ; 1.408      ;
; 1.192 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.050     ; 1.408      ;
; 1.192 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.050     ; 1.408      ;
; 1.192 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.050     ; 1.408      ;
; 1.192 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.050     ; 1.408      ;
; 1.207 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.473      ;
; 1.208 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.474      ;
; 1.210 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.476      ;
; 1.214 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.480      ;
; 1.216 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.482      ;
; 1.249 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.515      ;
; 1.290 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.007      ; 1.563      ;
; 1.290 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 1.557      ;
; 1.292 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 1.559      ;
; 1.312 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.006     ; 1.572      ;
; 1.314 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.006     ; 1.574      ;
; 1.334 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.600      ;
; 1.350 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.044     ; 1.572      ;
; 1.374 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.007      ; 1.647      ;
; 1.384 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.650      ;
; 1.389 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 1.656      ;
; 1.412 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.007      ; 1.685      ;
; 1.424 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 1.691      ;
; 1.429 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 1.696      ;
; 1.431 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 1.698      ;
; 1.474 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.043     ; 1.697      ;
; 1.474 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.043     ; 1.697      ;
; 1.487 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.044     ; 1.709      ;
; 1.487 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.044     ; 1.709      ;
; 1.487 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.007      ; 1.760      ;
; 1.493 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.044     ; 1.715      ;
; 1.508 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.774      ;
; 1.516 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.782      ;
; 1.518 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.784      ;
; 1.518 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.784      ;
; 1.546 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 1.813      ;
; 1.579 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.001     ; 1.844      ;
; 1.581 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.001     ; 1.846      ;
; 1.592 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.050     ; 1.808      ;
; 1.592 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.050     ; 1.808      ;
; 1.592 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.050     ; 1.808      ;
; 1.592 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.050     ; 1.808      ;
; 1.628 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.007      ; 1.901      ;
; 1.640 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.906      ;
; 1.642 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.908      ;
; 1.667 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 1.934      ;
; 1.682 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.948      ;
; 1.724 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 1.991      ;
+-------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Hold: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'                                                                                                                                                                                                                                            ;
+-------+-------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                               ; To Node                                                                    ; Launch Clock                                        ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; 0.675 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.941      ;
; 0.679 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.945      ;
; 0.801 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.067      ;
; 0.802 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.068      ;
; 0.806 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.072      ;
; 0.841 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.107      ;
; 0.842 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.108      ;
; 0.846 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.112      ;
; 0.848 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.114      ;
; 0.849 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.115      ;
; 0.944 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.210      ;
; 1.079 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.345      ;
; 1.179 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.445      ;
; 1.184 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.450      ;
; 1.185 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.451      ;
; 1.185 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.451      ;
; 1.220 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.486      ;
; 1.227 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.493      ;
; 1.228 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.494      ;
; 1.232 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.498      ;
; 1.234 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.500      ;
; 1.239 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.505      ;
; 1.256 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.522      ;
; 1.281 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.547      ;
; 1.298 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.564      ;
; 1.299 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.565      ;
; 1.305 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.571      ;
; 1.327 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.593      ;
; 1.352 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.618      ;
; 1.369 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.635      ;
; 1.391 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.657      ;
; 1.420 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.686      ;
; 1.423 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.689      ;
; 1.440 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.706      ;
; 1.458 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.724      ;
; 1.461 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.727      ;
; 1.462 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.728      ;
; 1.486 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.752      ;
; 1.528 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.794      ;
; 1.529 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.795      ;
; 1.533 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.799      ;
; 1.557 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.823      ;
; 1.599 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.865      ;
; 1.600 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.866      ;
; 1.628 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.894      ;
; 1.647 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.913      ;
; 1.669 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.935      ;
; 1.670 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.936      ;
; 1.741 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 2.007      ;
; 1.750 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 2.016      ;
; 1.768 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 2.034      ;
; 1.807 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 2.073      ;
; 1.886 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 2.152      ;
; 1.950 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 2.216      ;
+-------+-------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Hold: 'CLOCK_27'                                                                                                                                                             ;
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
; Slack ; From Node                                           ; To Node                                             ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
; 1.059 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.325      ;
; 1.176 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.442      ;
; 1.194 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.460      ;
; 1.195 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.461      ;
; 1.325 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.591      ;
; 1.334 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.600      ;
; 1.553 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[17] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.819      ;
; 1.557 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.823      ;
; 1.572 ; clock_generator:clock_generator_1|start_counter[11] ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.838      ;
; 1.573 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.839      ;
; 1.579 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.845      ;
; 1.599 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.865      ;
; 1.622 ; clock_generator:clock_generator_1|start_counter[12] ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.888      ;
; 1.657 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.923      ;
; 1.681 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.947      ;
; 1.716 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.982      ;
; 1.721 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.987      ;
; 1.765 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.032      ;
; 1.775 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.041      ;
; 1.788 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.054      ;
; 1.789 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.055      ;
; 1.793 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.059      ;
; 1.800 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.066      ;
; 1.804 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.070      ;
; 1.816 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.082      ;
; 1.822 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.088      ;
; 1.832 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.099      ;
; 1.893 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 2.157      ;
; 1.899 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 2.164      ;
; 1.916 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.183      ;
; 1.943 ; clock_generator:clock_generator_1|start_counter[18] ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 2.207      ;
; 1.947 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 2.212      ;
; 1.954 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.222      ;
; 1.966 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 2.231      ;
; 1.992 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.258      ;
; 2.014 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 2.279      ;
; 2.017 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.283      ;
; 2.032 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.300      ;
; 2.036 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.302      ;
; 2.041 ; clock_generator:clock_generator_1|start_counter[11] ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.307      ;
; 2.060 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.326      ;
; 2.087 ; clock_generator:clock_generator_1|start_counter[18] ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.353      ;
; 2.090 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.356      ;
; 2.095 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.361      ;
; 2.098 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 2.363      ;
; 2.100 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.368      ;
; 2.102 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 2.367      ;
; 2.108 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 2.373      ;
; 2.124 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.390      ;
; 2.152 ; clock_generator:clock_generator_1|start_counter[18] ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 2.417      ;
; 2.163 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.429      ;
; 2.164 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.432      ;
; 2.165 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 2.429      ;
; 2.168 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.434      ;
; 2.169 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.435      ;
; 2.169 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.435      ;
; 2.179 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 2.443      ;
; 2.185 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.451      ;
; 2.190 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.007     ; 2.449      ;
; 2.208 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.475      ;
; 2.215 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 2.479      ;
; 2.215 ; clock_generator:clock_generator_1|start_counter[18] ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 2.479      ;
; 2.216 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|reset             ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 2.480      ;
; 2.227 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.493      ;
; 2.233 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.499      ;
; 2.235 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.501      ;
; 2.235 ; clock_generator:clock_generator_1|start_counter[19] ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.007      ; 2.508      ;
; 2.236 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.502      ;
; 2.245 ; clock_generator:clock_generator_1|start_counter[18] ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.007      ; 2.518      ;
; 2.252 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.519      ;
; 2.252 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 2.516      ;
; 2.254 ; clock_generator:clock_generator_1|start_counter[19] ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 2.518      ;
; 2.259 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.527      ;
; 2.265 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 2.530      ;
; 2.266 ; clock_generator:clock_generator_1|start_counter[18] ; clock_generator:clock_generator_1|reset             ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 2.530      ;
; 2.275 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.542      ;
; 2.281 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.547      ;
; 2.282 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.008     ; 2.540      ;
; 2.285 ; clock_generator:clock_generator_1|start_counter[12] ; clock_generator:clock_generator_1|start_counter[17] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.007      ; 2.558      ;
; 2.286 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.553      ;
; 2.291 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.557      ;
; 2.299 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.565      ;
; 2.300 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.566      ;
; 2.303 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.570      ;
; 2.303 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.571      ;
; 2.313 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 2.577      ;
; 2.319 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.006      ; 2.591      ;
; 2.319 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.586      ;
; 2.321 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 2.586      ;
; 2.321 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.589      ;
; 2.321 ; clock_generator:clock_generator_1|start_counter[12] ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 2.585      ;
; 2.326 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.592      ;
; 2.332 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 2.597      ;
; 2.337 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.605      ;
; 2.353 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.620      ;
; 2.354 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.621      ;
; 2.354 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.622      ;
; 2.359 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.626      ;
; 2.359 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.008     ; 2.617      ;
; 2.370 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 2.635      ;
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Recovery: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                                                                ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                               ; To Node                                                                   ; Launch Clock ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; 3.745 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.393     ; 3.157      ;
; 3.745 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.393     ; 3.157      ;
; 3.745 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.393     ; 3.157      ;
; 3.745 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.393     ; 3.157      ;
; 3.745 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.393     ; 3.157      ;
; 3.745 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.393     ; 3.157      ;
; 3.753 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.392     ; 3.150      ;
; 3.753 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.392     ; 3.150      ;
; 3.753 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.392     ; 3.150      ;
; 3.753 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.392     ; 3.150      ;
; 3.997 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.399     ; 2.899      ;
; 3.997 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.399     ; 2.899      ;
; 3.997 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.399     ; 2.899      ;
; 3.997 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.399     ; 2.899      ;
; 3.997 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.399     ; 2.899      ;
; 3.997 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.399     ; 2.899      ;
; 3.997 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.399     ; 2.899      ;
; 3.997 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.399     ; 2.899      ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Removal: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                                                                 ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                               ; To Node                                                                   ; Launch Clock ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; 5.033 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.399     ; 2.899      ;
; 5.033 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.399     ; 2.899      ;
; 5.033 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.399     ; 2.899      ;
; 5.033 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.399     ; 2.899      ;
; 5.033 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.399     ; 2.899      ;
; 5.033 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.399     ; 2.899      ;
; 5.033 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.399     ; 2.899      ;
; 5.033 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.399     ; 2.899      ;
; 5.277 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.392     ; 3.150      ;
; 5.277 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.392     ; 3.150      ;
; 5.277 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.392     ; 3.150      ;
; 5.277 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.392     ; 3.150      ;
; 5.285 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.393     ; 3.157      ;
; 5.285 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.393     ; 3.157      ;
; 5.285 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.393     ; 3.157      ;
; 5.285 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.393     ; 3.157      ;
; 5.285 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.393     ; 3.157      ;
; 5.285 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.393     ; 3.157      ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width: 'AUD_BCLK'                                                                                                                               ;
+--------+--------------+----------------+------------------+----------+------------+--------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                                               ;
+--------+--------------+----------------+------------------+----------+------------+--------------------------------------------------------------------------------------+
; -1.222 ; 1.000        ; 2.222          ; Port Rate        ; AUD_BCLK ; Rise       ; AUD_BCLK                                                                             ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[0]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[0]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[2]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[2]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[0] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[0] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[10]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[10]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[12]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[12]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[13]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[13]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[14]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[14]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[15]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[15]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[6]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[6]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[7]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[7]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[9]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[9]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[0]            ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[0]            ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[10]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[10]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[11]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[11]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[12]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[12]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[13]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[13]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[14]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[14]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[15]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[15]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[16]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[16]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[17]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[17]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[18]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[18]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[19]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[19]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[1]            ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[1]            ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[20]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[20]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[21]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[21]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[22]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[22]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[23]           ;
+--------+--------------+----------------+------------------+----------+------------+--------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'                                                                                                                        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                  ; Clock Edge ; Target                                                                        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[0]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[0]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[10] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[10] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[11] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[11] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[12] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[12] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[13] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[13] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[14] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[14] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[15] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[15] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[16] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[16] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[17] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[17] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[18] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[18] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[19] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[19] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[1]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[1]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[20] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[20] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[21] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[21] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[22] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[22] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[23] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[23] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[2]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[2]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[3]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[3]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[4]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[4]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[5]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[5]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[6]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[6]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[7]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[7]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[8]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[8]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[9]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[9]  ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[0]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[0]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[10]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[10]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[11]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[11]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[12]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[12]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[13]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[13]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[14]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[14]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[15]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[15]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[16]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[16]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[17]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[17]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[18]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[18]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[19]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[19]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[1]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[1]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[20]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[20]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[21]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[21]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[22]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[22]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[23]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[23]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[2]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[2]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[3]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[3]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[4]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[4]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[5]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[5]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[6]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[6]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[7]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[7]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[8]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[8]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[9]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[9]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|filter_unit_1|enql|regout                                        ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|filter_unit_1|enql|regout                                        ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|filter_unit_1|enql~clkctrl|inclk[0]                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|filter_unit_1|enql~clkctrl|inclk[0]                              ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'                                                                                                                        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                  ; Clock Edge ; Target                                                                        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[0]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[0]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[10] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[10] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[11] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[11] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[12] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[12] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[13] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[13] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[14] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[14] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[15] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[15] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[16] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[16] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[17] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[17] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[18] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[18] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[19] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[19] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[1]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[1]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[20] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[20] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[21] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[21] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[22] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[22] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[23] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[23] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[2]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[2]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[3]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[3]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[4]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[4]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[5]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[5]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[6]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[6]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[7]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[7]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[8]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[8]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[9]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[9]  ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[0]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[0]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[10]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[10]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[11]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[11]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[12]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[12]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[13]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[13]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[14]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[14]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[15]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[15]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[16]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[16]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[17]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[17]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[18]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[18]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[19]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[19]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[1]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[1]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[20]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[20]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[21]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[21]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[22]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[22]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[23]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[23]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[2]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[2]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[3]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[3]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[4]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[4]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[5]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[5]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[6]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[6]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[7]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[7]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[8]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[8]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[9]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[9]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|filter_unit_1|enqr|regout                                        ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|filter_unit_1|enqr|regout                                        ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|filter_unit_1|enqr~clkctrl|inclk[0]                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|filter_unit_1|enqr~clkctrl|inclk[0]                              ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'                                                                                                                                                                ;
+-------+--------------+----------------+------------------+-----------------------------------------------------+------------+------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                               ; Clock Edge ; Target                                                                                                                 ;
+-------+--------------+----------------+------------------+-----------------------------------------------------+------------+------------------------------------------------------------------------------------------------------------------------+
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[30]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[30]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[30]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[30]~_Duplicate_1 ;
+-------+--------------+----------------+------------------+-----------------------------------------------------+------------+------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width: 'CLOCK_50'                                                                                                ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+
; 10.000 ; 10.000       ; 0.000          ; High Pulse Width ; CLOCK_50 ; Rise       ; CLOCK_50|combout                                      ;
; 10.000 ; 10.000       ; 0.000          ; Low Pulse Width  ; CLOCK_50 ; Rise       ; CLOCK_50|combout                                      ;
; 10.000 ; 10.000       ; 0.000          ; High Pulse Width ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0]   ;
; 10.000 ; 10.000       ; 0.000          ; Low Pulse Width  ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0]   ;
; 10.000 ; 10.000       ; 0.000          ; High Pulse Width ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[1]   ;
; 10.000 ; 10.000       ; 0.000          ; Low Pulse Width  ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[1]   ;
; 10.000 ; 10.000       ; 0.000          ; High Pulse Width ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|inclk[0] ;
; 10.000 ; 10.000       ; 0.000          ; Low Pulse Width  ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|inclk[0] ;
; 17.620 ; 20.000       ; 2.380          ; Port Rate        ; CLOCK_50 ; Rise       ; CLOCK_50                                              ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width: 'CLOCK_27'                                                                                                ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|reset               ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[0]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[10]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[11]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[12]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[13]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[14]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[15]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[16]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[17]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[18]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[19]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[1]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[20]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[21]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[22]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[23]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[24]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[25]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[2]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[3]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[4]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[5]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[6]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[7]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[8]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[9]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|reset               ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[0]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[10]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[11]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[12]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[13]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[14]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[15]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[16]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[17]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[18]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[19]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[1]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[20]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[21]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[22]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[23]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[24]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[25]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[2]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[3]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[4]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[5]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[6]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[7]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[8]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[9]    ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; CLOCK_27|combout                                      ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; CLOCK_27~clkctrl|inclk[0]                             ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; CLOCK_27~clkctrl|outclk                               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1]   ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|inclk[0] ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|reset|clk                           ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[0]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[10]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[11]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[12]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[13]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[14]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[15]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[16]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[17]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[18]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[19]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[1]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[20]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[21]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[22]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[23]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[24]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[25]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[2]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[3]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[4]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[5]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[6]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[7]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[8]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[9]|clk                ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; CLOCK_27|combout                                      ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; CLOCK_27~clkctrl|inclk[0]                             ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; CLOCK_27~clkctrl|outclk                               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1]   ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|inclk[0] ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|reset|clk                           ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[0]|clk                ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[10]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[11]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[12]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[13]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[14]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[15]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[16]|clk               ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                    ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+---------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                               ; Clock Edge ; Target                                                                    ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+---------------------------------------------------------------------------+
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[0]|clk                               ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[1]|clk                               ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[2]|clk                               ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[3]|clk                               ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[0]|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[1]|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[2]|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[3]|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SCLK|clk                                        ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SDIN~en|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SDIN~reg0|clk                                   ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Sektion[0]|clk                                  ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Sektion[1]|clk                                  ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack_warten2|clk                      ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack_warten|clk                       ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack|clk                              ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.anfangszustand|clk                   ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.bit_n|clk                            ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ende|clk                             ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.error|clk                            ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.startbedingung|clk                   ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.stop_warten|clk                      ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.stopbedingung|clk                    ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.taktende|clk                         ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_2|altpll_component|_clk1~clkctrl|inclk[0]           ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_2|altpll_component|_clk1~clkctrl|outclk             ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[0]|clk                               ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[1]|clk                               ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[2]|clk                               ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[3]|clk                               ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[0]|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[1]|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[2]|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[3]|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SCLK|clk                                        ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SDIN~en|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SDIN~reg0|clk                                   ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Sektion[0]|clk                                  ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Sektion[1]|clk                                  ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack_warten2|clk                      ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack_warten|clk                       ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack|clk                              ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.anfangszustand|clk                   ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.bit_n|clk                            ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ende|clk                             ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.error|clk                            ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.startbedingung|clk                   ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.stop_warten|clk                      ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.stopbedingung|clk                    ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.taktende|clk                         ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_2|altpll_component|_clk1~clkctrl|inclk[0]           ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_2|altpll_component|_clk1~clkctrl|outclk             ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+---------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'                                                                                                                     ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                               ; Clock Edge ; Target                                                                     ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------+
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[0]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[0]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[1]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[1]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[2]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[2]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[3]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[3]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[4]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[4]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[5]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[5]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[6]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[6]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[7]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[7]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[8]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[8]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|clk_400kHz|clk                           ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|clk_400kHz|clk                           ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_1|altpll_component|_clk1~clkctrl|inclk[0]            ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_1|altpll_component|_clk1~clkctrl|inclk[0]            ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_1|altpll_component|_clk1~clkctrl|outclk              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_1|altpll_component|_clk1~clkctrl|outclk              ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                   ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; Data Port   ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                     ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; AUD_ADCDAT  ; AUD_BCLK   ; 3.337  ; 3.337  ; Rise       ; AUD_BCLK                                            ;
; AUD_ADCLRCK ; AUD_BCLK   ; 5.501  ; 5.501  ; Rise       ; AUD_BCLK                                            ;
; AUD_DACLRCK ; AUD_BCLK   ; 4.979  ; 4.979  ; Fall       ; AUD_BCLK                                            ;
; SW[*]       ; CLOCK_27   ; 5.027  ; 5.027  ; Rise       ; CLOCK_27                                            ;
;  SW[17]     ; CLOCK_27   ; 5.027  ; 5.027  ; Rise       ; CLOCK_27                                            ;
; KEY[*]      ; CLOCK_50   ; 10.605 ; 10.605 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[0]     ; CLOCK_50   ; 10.605 ; 10.605 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[1]     ; CLOCK_50   ; 9.810  ; 9.810  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[2]     ; CLOCK_50   ; 8.552  ; 8.552  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[3]     ; CLOCK_50   ; 8.976  ; 8.976  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; 3.801  ; 3.801  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[2]      ; CLOCK_50   ; 3.801  ; 3.801  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; 3.900  ; 3.900  ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[1]      ; CLOCK_50   ; 3.900  ; 3.900  ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; I2C_SDAT    ; CLOCK_27   ; 7.847  ; 7.847  ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                    ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; Data Port   ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                     ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; AUD_ADCDAT  ; AUD_BCLK   ; -2.936 ; -2.936 ; Rise       ; AUD_BCLK                                            ;
; AUD_ADCLRCK ; AUD_BCLK   ; -3.519 ; -3.519 ; Rise       ; AUD_BCLK                                            ;
; AUD_DACLRCK ; AUD_BCLK   ; -3.242 ; -3.242 ; Fall       ; AUD_BCLK                                            ;
; SW[*]       ; CLOCK_27   ; -4.423 ; -4.423 ; Rise       ; CLOCK_27                                            ;
;  SW[17]     ; CLOCK_27   ; -4.423 ; -4.423 ; Rise       ; CLOCK_27                                            ;
; KEY[*]      ; CLOCK_50   ; -6.443 ; -6.443 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[0]     ; CLOCK_50   ; -6.443 ; -6.443 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[1]     ; CLOCK_50   ; -8.924 ; -8.924 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[2]     ; CLOCK_50   ; -6.977 ; -6.977 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[3]     ; CLOCK_50   ; -7.680 ; -7.680 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; -2.940 ; -2.940 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[2]      ; CLOCK_50   ; -2.940 ; -2.940 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; -2.161 ; -2.161 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[1]      ; CLOCK_50   ; -2.161 ; -2.161 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; I2C_SDAT    ; CLOCK_27   ; -6.628 ; -6.628 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                        ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                     ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; AUD_DACDAT   ; AUD_BCLK   ; 7.825 ; 7.825 ; Fall       ; AUD_BCLK                                            ;
; LCD_DATA[*]  ; CLOCK_50   ; 5.361 ; 5.361 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[0] ; CLOCK_50   ; 4.810 ; 4.810 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[1] ; CLOCK_50   ; 5.018 ; 5.018 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[2] ; CLOCK_50   ; 5.210 ; 5.210 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[3] ; CLOCK_50   ; 5.103 ; 5.103 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[4] ; CLOCK_50   ; 4.831 ; 4.831 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[5] ; CLOCK_50   ; 5.218 ; 5.218 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[6] ; CLOCK_50   ; 5.273 ; 5.273 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[7] ; CLOCK_50   ; 5.361 ; 5.361 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_EN       ; CLOCK_50   ; 5.031 ; 5.031 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_RS       ; CLOCK_50   ; 5.123 ; 5.123 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX0[*]      ; CLOCK_50   ; 6.319 ; 6.319 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[2]     ; CLOCK_50   ; 5.983 ; 5.983 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[3]     ; CLOCK_50   ; 6.290 ; 6.290 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[4]     ; CLOCK_50   ; 6.319 ; 6.319 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[5]     ; CLOCK_50   ; 6.287 ; 6.287 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[6]     ; CLOCK_50   ; 6.005 ; 6.005 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX1[*]      ; CLOCK_50   ; 7.416 ; 7.416 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[1]     ; CLOCK_50   ; 7.416 ; 7.416 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[2]     ; CLOCK_50   ; 5.366 ; 5.366 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[3]     ; CLOCK_50   ; 6.050 ; 6.050 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[4]     ; CLOCK_50   ; 7.037 ; 7.037 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[6]     ; CLOCK_50   ; 5.454 ; 5.454 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX2[*]      ; CLOCK_50   ; 7.827 ; 7.827 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[0]     ; CLOCK_50   ; 7.827 ; 7.827 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[1]     ; CLOCK_50   ; 7.081 ; 7.081 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[2]     ; CLOCK_50   ; 7.682 ; 7.682 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[3]     ; CLOCK_50   ; 7.489 ; 7.489 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[4]     ; CLOCK_50   ; 5.817 ; 5.817 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[5]     ; CLOCK_50   ; 7.102 ; 7.102 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[6]     ; CLOCK_50   ; 6.517 ; 6.517 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX3[*]      ; CLOCK_50   ; 8.036 ; 8.036 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[0]     ; CLOCK_50   ; 8.036 ; 8.036 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[1]     ; CLOCK_50   ; 5.824 ; 5.824 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[2]     ; CLOCK_50   ; 6.324 ; 6.324 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[3]     ; CLOCK_50   ; 7.579 ; 7.579 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[4]     ; CLOCK_50   ; 6.232 ; 6.232 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[5]     ; CLOCK_50   ; 6.815 ; 6.815 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[6]     ; CLOCK_50   ; 5.882 ; 5.882 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX4[*]      ; CLOCK_50   ; 6.050 ; 6.050 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX4[6]     ; CLOCK_50   ; 6.050 ; 6.050 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX6[*]      ; CLOCK_50   ; 4.960 ; 4.960 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[0]     ; CLOCK_50   ; 4.960 ; 4.960 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[1]     ; CLOCK_50   ; 4.850 ; 4.850 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[2]     ; CLOCK_50   ; 4.669 ; 4.669 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[3]     ; CLOCK_50   ; 4.448 ; 4.448 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[4]     ; CLOCK_50   ; 4.916 ; 4.916 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[5]     ; CLOCK_50   ; 4.815 ; 4.815 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[6]     ; CLOCK_50   ; 4.822 ; 4.822 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX7[*]      ; CLOCK_50   ; 5.434 ; 5.434 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[0]     ; CLOCK_50   ; 4.978 ; 4.978 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[1]     ; CLOCK_50   ; 5.434 ; 5.434 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[2]     ; CLOCK_50   ; 5.404 ; 5.404 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[3]     ; CLOCK_50   ; 4.948 ; 4.948 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[4]     ; CLOCK_50   ; 4.948 ; 4.948 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[5]     ; CLOCK_50   ; 5.101 ; 5.101 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; AUD_XCK      ; CLOCK_27   ; 2.917 ;       ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SCLK     ; CLOCK_27   ; 5.063 ; 5.063 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SDAT     ; CLOCK_27   ; 5.075 ; 5.075 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; AUD_XCK      ; CLOCK_27   ;       ; 2.917 ; Fall       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                     ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; AUD_DACDAT   ; AUD_BCLK   ; 7.825 ; 7.825 ; Fall       ; AUD_BCLK                                            ;
; LCD_DATA[*]  ; CLOCK_50   ; 4.810 ; 4.810 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[0] ; CLOCK_50   ; 4.810 ; 4.810 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[1] ; CLOCK_50   ; 5.018 ; 5.018 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[2] ; CLOCK_50   ; 5.210 ; 5.210 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[3] ; CLOCK_50   ; 5.103 ; 5.103 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[4] ; CLOCK_50   ; 4.831 ; 4.831 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[5] ; CLOCK_50   ; 5.218 ; 5.218 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[6] ; CLOCK_50   ; 5.273 ; 5.273 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[7] ; CLOCK_50   ; 5.361 ; 5.361 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_EN       ; CLOCK_50   ; 5.031 ; 5.031 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_RS       ; CLOCK_50   ; 5.123 ; 5.123 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX0[*]      ; CLOCK_50   ; 5.983 ; 5.983 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[2]     ; CLOCK_50   ; 5.983 ; 5.983 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[3]     ; CLOCK_50   ; 6.290 ; 6.290 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[4]     ; CLOCK_50   ; 6.319 ; 6.319 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[5]     ; CLOCK_50   ; 6.287 ; 6.287 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[6]     ; CLOCK_50   ; 6.005 ; 6.005 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX1[*]      ; CLOCK_50   ; 5.366 ; 5.366 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[1]     ; CLOCK_50   ; 7.416 ; 7.416 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[2]     ; CLOCK_50   ; 5.366 ; 5.366 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[3]     ; CLOCK_50   ; 6.050 ; 6.050 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[4]     ; CLOCK_50   ; 7.037 ; 7.037 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[6]     ; CLOCK_50   ; 5.454 ; 5.454 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX2[*]      ; CLOCK_50   ; 5.817 ; 5.817 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[0]     ; CLOCK_50   ; 7.827 ; 7.827 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[1]     ; CLOCK_50   ; 7.081 ; 7.081 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[2]     ; CLOCK_50   ; 7.682 ; 7.682 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[3]     ; CLOCK_50   ; 7.489 ; 7.489 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[4]     ; CLOCK_50   ; 5.817 ; 5.817 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[5]     ; CLOCK_50   ; 7.102 ; 7.102 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[6]     ; CLOCK_50   ; 6.517 ; 6.517 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX3[*]      ; CLOCK_50   ; 5.824 ; 5.824 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[0]     ; CLOCK_50   ; 8.036 ; 8.036 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[1]     ; CLOCK_50   ; 5.824 ; 5.824 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[2]     ; CLOCK_50   ; 6.324 ; 6.324 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[3]     ; CLOCK_50   ; 7.579 ; 7.579 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[4]     ; CLOCK_50   ; 6.232 ; 6.232 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[5]     ; CLOCK_50   ; 6.815 ; 6.815 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[6]     ; CLOCK_50   ; 5.882 ; 5.882 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX4[*]      ; CLOCK_50   ; 6.050 ; 6.050 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX4[6]     ; CLOCK_50   ; 6.050 ; 6.050 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX6[*]      ; CLOCK_50   ; 4.448 ; 4.448 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[0]     ; CLOCK_50   ; 4.960 ; 4.960 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[1]     ; CLOCK_50   ; 4.850 ; 4.850 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[2]     ; CLOCK_50   ; 4.669 ; 4.669 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[3]     ; CLOCK_50   ; 4.448 ; 4.448 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[4]     ; CLOCK_50   ; 4.916 ; 4.916 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[5]     ; CLOCK_50   ; 4.815 ; 4.815 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[6]     ; CLOCK_50   ; 4.822 ; 4.822 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX7[*]      ; CLOCK_50   ; 4.948 ; 4.948 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[0]     ; CLOCK_50   ; 4.978 ; 4.978 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[1]     ; CLOCK_50   ; 5.434 ; 5.434 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[2]     ; CLOCK_50   ; 5.404 ; 5.404 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[3]     ; CLOCK_50   ; 4.948 ; 4.948 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[4]     ; CLOCK_50   ; 4.948 ; 4.948 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[5]     ; CLOCK_50   ; 5.101 ; 5.101 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; AUD_XCK      ; CLOCK_27   ; 2.917 ;       ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SCLK     ; CLOCK_27   ; 5.063 ; 5.063 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SDAT     ; CLOCK_27   ; 5.075 ; 5.075 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; AUD_XCK      ; CLOCK_27   ;       ; 2.917 ; Fall       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+


+----------------------------------------------------+
; Propagation Delay                                  ;
+------------+-------------+-------+----+----+-------+
; Input Port ; Output Port ; RR    ; RF ; FR ; FF    ;
+------------+-------------+-------+----+----+-------+
; SW[0]      ; AUD_DACDAT  ; 7.421 ;    ;    ; 7.421 ;
+------------+-------------+-------+----+----+-------+


+----------------------------------------------------+
; Minimum Propagation Delay                          ;
+------------+-------------+-------+----+----+-------+
; Input Port ; Output Port ; RR    ; RF ; FR ; FF    ;
+------------+-------------+-------+----+----+-------+
; SW[0]      ; AUD_DACDAT  ; 7.421 ;    ;    ; 7.421 ;
+------------+-------------+-------+----+----+-------+


+----------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                      ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+
; Data Port ; Clock Port ; Rise  ; Fall ; Clock Edge ; Clock Reference                                     ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+
; I2C_SDAT  ; CLOCK_27   ; 5.020 ;      ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                              ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+
; Data Port ; Clock Port ; Rise  ; Fall ; Clock Edge ; Clock Reference                                     ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+
; I2C_SDAT  ; CLOCK_27   ; 5.020 ;      ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                              ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+
; Data Port ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                     ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+
; I2C_SDAT  ; CLOCK_27   ; 5.020     ;           ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                      ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+
; Data Port ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                     ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+
; I2C_SDAT  ; CLOCK_27   ; 5.020     ;           ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+


+---------------------------------------------------------------------------------+
; Fast Model Setup Summary                                                        ;
+--------------------------------------------------------+--------+---------------+
; Clock                                                  ; Slack  ; End Point TNS ;
+--------------------------------------------------------+--------+---------------+
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; -3.025 ; -628.877      ;
; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; -1.011 ; -19.988       ;
; AUD_BCLK                                               ; -0.491 ; -46.337       ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.951  ; 0.000         ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 2.195  ; 0.000         ;
; CLOCK_27                                               ; 34.784 ; 0.000         ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 98.899 ; 0.000         ;
+--------------------------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------+
; Fast Model Hold Summary                                                         ;
+--------------------------------------------------------+--------+---------------+
; Clock                                                  ; Slack  ; End Point TNS ;
+--------------------------------------------------------+--------+---------------+
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; -1.512 ; -34.600       ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; -1.421 ; -27.973       ;
; AUD_BCLK                                               ; -0.061 ; -0.394        ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 0.022  ; 0.000         ;
; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 0.215  ; 0.000         ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 0.303  ; 0.000         ;
; CLOCK_27                                               ; 0.458  ; 0.000         ;
+--------------------------------------------------------+--------+---------------+


+-----------------------------------------------------------------------------+
; Fast Model Recovery Summary                                                 ;
+-----------------------------------------------------+-------+---------------+
; Clock                                               ; Slack ; End Point TNS ;
+-----------------------------------------------------+-------+---------------+
; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 6.072 ; 0.000         ;
+-----------------------------------------------------+-------+---------------+


+-----------------------------------------------------------------------------+
; Fast Model Removal Summary                                                  ;
+-----------------------------------------------------+-------+---------------+
; Clock                                               ; Slack ; End Point TNS ;
+-----------------------------------------------------+-------+---------------+
; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 2.948 ; 0.000         ;
+-----------------------------------------------------+-------+---------------+


+---------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width Summary                                          ;
+--------------------------------------------------------+--------+---------------+
; Clock                                                  ; Slack  ; End Point TNS ;
+--------------------------------------------------------+--------+---------------+
; AUD_BCLK                                               ; -1.222 ; -142.222      ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; -0.500 ; -24.000       ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; -0.500 ; -24.000       ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 7.981  ; 0.000         ;
; CLOCK_50                                               ; 10.000 ; 0.000         ;
; CLOCK_27                                               ; 17.518 ; 0.000         ;
; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 40.666 ; 0.000         ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 49.000 ; 0.000         ;
+--------------------------------------------------------+--------+---------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Setup: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'                                                                                                                                                    ;
+--------+-----------------------------------------+-----------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                               ; To Node                                                   ; Launch Clock ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------+-----------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; -3.025 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[1]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.558     ; 1.500      ;
; -3.025 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.558     ; 1.500      ;
; -3.025 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[4]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.558     ; 1.500      ;
; -3.024 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.561     ; 1.496      ;
; -3.024 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[0]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.561     ; 1.496      ;
; -3.024 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[5]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.561     ; 1.496      ;
; -3.024 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[4]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.561     ; 1.496      ;
; -3.022 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[15]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.581     ; 1.474      ;
; -3.022 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[14]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.581     ; 1.474      ;
; -3.022 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[16]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.581     ; 1.474      ;
; -3.022 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[17]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.581     ; 1.474      ;
; -3.022 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[19]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.581     ; 1.474      ;
; -3.022 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[18]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.581     ; 1.474      ;
; -3.022 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[13]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.581     ; 1.474      ;
; -3.022 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[11]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.581     ; 1.474      ;
; -3.022 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[12]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.581     ; 1.474      ;
; -3.022 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[10]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.581     ; 1.474      ;
; -3.022 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[7]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.559     ; 1.496      ;
; -3.022 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.559     ; 1.496      ;
; -3.022 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.559     ; 1.496      ;
; -3.022 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[3]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.559     ; 1.496      ;
; -3.019 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[0]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.556     ; 1.496      ;
; -3.007 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[7]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.483      ;
; -3.007 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.483      ;
; -3.007 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[2]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.483      ;
; -3.007 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.483      ;
; -3.001 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.562     ; 1.472      ;
; -3.001 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[0]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.562     ; 1.472      ;
; -3.001 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f9_db[1]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.559     ; 1.475      ;
; -2.990 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[5]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.564     ; 1.459      ;
; -2.990 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[7]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.564     ; 1.459      ;
; -2.990 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.564     ; 1.459      ;
; -2.990 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[4]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.564     ; 1.459      ;
; -2.990 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.564     ; 1.459      ;
; -2.990 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[3]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.564     ; 1.459      ;
; -2.985 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.560     ; 1.458      ;
; -2.964 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.419      ;
; -2.964 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[0]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.419      ;
; -2.964 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[5]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.419      ;
; -2.964 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[7]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.419      ;
; -2.964 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.419      ;
; -2.964 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[4]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.419      ;
; -2.964 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.419      ;
; -2.964 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[3]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.419      ;
; -2.962 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[7]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.575     ; 1.420      ;
; -2.962 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[5]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.575     ; 1.420      ;
; -2.962 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.575     ; 1.420      ;
; -2.962 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.575     ; 1.420      ;
; -2.962 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[3]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.575     ; 1.420      ;
; -2.958 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.567     ; 1.424      ;
; -2.955 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[0]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.574     ; 1.414      ;
; -2.955 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[4]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.574     ; 1.414      ;
; -2.955 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f12_db[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.554     ; 1.434      ;
; -2.955 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.574     ; 1.414      ;
; -2.955 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f12_db[0]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.554     ; 1.434      ;
; -2.948 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[1]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.562     ; 1.419      ;
; -2.948 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.562     ; 1.419      ;
; -2.948 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[4]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.562     ; 1.419      ;
; -2.930 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f5_db[1]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.561     ; 1.402      ;
; -2.930 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f5_db[0]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.561     ; 1.402      ;
; -2.930 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f5_db[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.561     ; 1.402      ;
; -2.930 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f5_db[4]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.561     ; 1.402      ;
; -2.927 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[22] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.403      ;
; -2.927 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[21] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.403      ;
; -2.927 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[27] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.403      ;
; -2.927 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[20] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.403      ;
; -2.927 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[14] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.403      ;
; -2.927 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[15] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.403      ;
; -2.927 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[26] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.403      ;
; -2.927 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[25] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.403      ;
; -2.927 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[24] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.403      ;
; -2.927 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[23] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.403      ;
; -2.927 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[19] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.403      ;
; -2.927 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[18] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.403      ;
; -2.927 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[16] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.403      ;
; -2.927 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[17] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.403      ;
; -2.926 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[0]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.561     ; 1.398      ;
; -2.925 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f1_db[0]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.558     ; 1.400      ;
; -2.925 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f1_db[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.558     ; 1.400      ;
; -2.925 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f1_db[4]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.558     ; 1.400      ;
; -2.925 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f1_db[1]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.558     ; 1.400      ;
; -2.925 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f1_db[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.558     ; 1.400      ;
; -2.925 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f1_db[2]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.558     ; 1.400      ;
; -2.925 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f1_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.558     ; 1.400      ;
; -2.920 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[2]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.571     ; 1.382      ;
; -2.920 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.571     ; 1.382      ;
; -2.917 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[0]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.572     ; 1.378      ;
; -2.908 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[7]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.590     ; 1.351      ;
; -2.908 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[8]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.590     ; 1.351      ;
; -2.908 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.590     ; 1.351      ;
; -2.908 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[9]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.590     ; 1.351      ;
; -2.908 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.590     ; 1.351      ;
; -2.908 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.590     ; 1.351      ;
; -2.908 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[4]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.590     ; 1.351      ;
; -2.908 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[2]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.590     ; 1.351      ;
; -2.908 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[1]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.590     ; 1.351      ;
; -2.908 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[0]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.590     ; 1.351      ;
; -2.898 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|output[8]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.587     ; 1.344      ;
; -2.898 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|output[4]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.587     ; 1.344      ;
; -2.898 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|lcd_controller:lcd_controller_1|output[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.587     ; 1.344      ;
+--------+-----------------------------------------+-----------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Setup: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                                                                                                                                              ;
+--------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                                  ; To Node                                                                   ; Launch Clock                                        ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; -1.011 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.042     ; 1.002      ;
; -1.011 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.042     ; 1.002      ;
; -0.926 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.041     ; 0.918      ;
; -0.926 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.041     ; 0.918      ;
; -0.926 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.041     ; 0.918      ;
; -0.926 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.041     ; 0.918      ;
; -0.913 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.036     ; 0.910      ;
; -0.911 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.036     ; 0.908      ;
; -0.893 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.036     ; 0.890      ;
; -0.893 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.036     ; 0.890      ;
; -0.884 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.035     ; 0.882      ;
; -0.884 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.035     ; 0.882      ;
; -0.803 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.036     ; 0.800      ;
; -0.763 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.041     ; 0.755      ;
; -0.763 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.041     ; 0.755      ;
; -0.763 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.041     ; 0.755      ;
; -0.763 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.041     ; 0.755      ;
; -0.763 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.041     ; 0.755      ;
; -0.763 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.041     ; 0.755      ;
; -0.763 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.041     ; 0.755      ;
; -0.763 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.041     ; 0.755      ;
; -0.743 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.036     ; 0.740      ;
; -0.618 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.035     ; 0.616      ;
; -0.616 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.035     ; 0.614      ;
; 5.852  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.614     ; 1.825      ;
; 5.852  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.614     ; 1.825      ;
; 5.937  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.613     ; 1.741      ;
; 5.937  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.613     ; 1.741      ;
; 5.937  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.613     ; 1.741      ;
; 5.937  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.613     ; 1.741      ;
; 80.549 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 2.822      ;
; 80.664 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 2.707      ;
; 80.735 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 2.636      ;
; 80.808 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.007      ; 2.564      ;
; 80.859 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.007      ; 2.513      ;
; 80.945 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 2.426      ;
; 81.915 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.450      ;
; 81.935 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 1.431      ;
; 82.165 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.200      ;
; 82.212 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 1.152      ;
; 82.212 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 1.152      ;
; 82.229 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 1.135      ;
; 82.229 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 1.135      ;
; 82.298 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 1.066      ;
; 82.298 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 1.066      ;
; 82.359 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.006      ;
; 82.401 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 0.970      ;
; 82.449 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende            ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 0.917      ;
; 82.451 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 0.915      ;
; 82.452 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 0.914      ;
; 82.470 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 0.896      ;
; 82.475 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.890      ;
; 82.475 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.890      ;
; 82.477 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.888      ;
; 82.485 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 0.879      ;
; 82.487 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 0.877      ;
; 82.492 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 0.879      ;
; 82.513 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.852      ;
; 82.519 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.846      ;
; 82.528 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.837      ;
; 82.530 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.835      ;
; 82.531 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 0.835      ;
; 82.545 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.820      ;
; 82.551 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 0.815      ;
; 82.552 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 0.814      ;
; 82.553 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 0.818      ;
; 82.570 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 0.796      ;
; 82.589 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 0.782      ;
; 82.609 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.756      ;
; 82.609 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 0.762      ;
; 82.622 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.005     ; 0.738      ;
; 82.625 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.005     ; 0.735      ;
; 82.634 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 0.737      ;
; 82.636 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 0.730      ;
; 82.637 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 0.729      ;
; 82.639 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.726      ;
; 82.646 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.719      ;
; 82.647 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.718      ;
; 82.657 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.708      ;
; 82.662 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.703      ;
; 82.673 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.692      ;
; 82.682 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.005      ; 0.688      ;
; 82.706 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.005     ; 0.654      ;
; 82.708 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.657      ;
; 82.713 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 0.658      ;
; 82.717 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 0.647      ;
; 82.755 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.610      ;
; 82.757 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.608      ;
; 82.759 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.001      ; 0.607      ;
; 82.760 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.605      ;
; 82.762 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 0.602      ;
; 82.762 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.001     ; 0.602      ;
; 82.769 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.596      ;
; 82.773 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.592      ;
; 82.779 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.586      ;
; 82.780 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.585      ;
; 82.789 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.576      ;
; 82.793 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.572      ;
; 82.820 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.545      ;
; 82.821 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.544      ;
+--------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Setup: 'AUD_BCLK'                                                                                                                                                                                                                                                                                                 ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------+-------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                          ; Launch Clock                                           ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------+-------------+--------------+------------+------------+
; -0.491 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[4] ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.000      ; 1.523      ;
; -0.464 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[23]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.059      ; 1.555      ;
; -0.464 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[22]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.059      ; 1.555      ;
; -0.464 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[21]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.059      ; 1.555      ;
; -0.464 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[20]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.059      ; 1.555      ;
; -0.464 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[19]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.059      ; 1.555      ;
; -0.464 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[18]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.059      ; 1.555      ;
; -0.464 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[9]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.059      ; 1.555      ;
; -0.464 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[8]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.059      ; 1.555      ;
; -0.463 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[7]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.058      ; 1.553      ;
; -0.463 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[6]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.058      ; 1.553      ;
; -0.463 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[5]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.058      ; 1.553      ;
; -0.463 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[4]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.058      ; 1.553      ;
; -0.463 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[3]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.058      ; 1.553      ;
; -0.463 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[2]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.058      ; 1.553      ;
; -0.463 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[1]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.058      ; 1.553      ;
; -0.456 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.000      ; 1.488      ;
; -0.425 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[7]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.113      ; 1.570      ;
; -0.425 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[6]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.113      ; 1.570      ;
; -0.425 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[5]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.113      ; 1.570      ;
; -0.425 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[4]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.113      ; 1.570      ;
; -0.425 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[3]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.113      ; 1.570      ;
; -0.425 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[2]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.113      ; 1.570      ;
; -0.425 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[1]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.113      ; 1.570      ;
; -0.424 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.813      ;
; -0.424 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.813      ;
; -0.424 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.813      ;
; -0.424 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.813      ;
; -0.424 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.813      ;
; -0.424 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.813      ;
; -0.424 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.813      ;
; -0.424 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]                      ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.813      ;
; -0.424 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]                      ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.813      ;
; -0.424 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]                      ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.813      ;
; -0.424 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]                      ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.813      ;
; -0.424 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]                      ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.813      ;
; -0.424 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]                      ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.813      ;
; -0.424 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[14]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.813      ;
; -0.424 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[15]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.813      ;
; -0.424 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.813      ;
; -0.422 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[23]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|dacdat                     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; 0.500        ; -0.139     ; 0.815      ;
; -0.421 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[2] ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.000      ; 1.453      ;
; -0.406 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[23]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.112      ; 1.550      ;
; -0.406 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[22]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.112      ; 1.550      ;
; -0.406 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[21]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.112      ; 1.550      ;
; -0.406 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[20]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.112      ; 1.550      ;
; -0.406 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[19]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.112      ; 1.550      ;
; -0.406 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[18]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.112      ; 1.550      ;
; -0.406 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[17]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.112      ; 1.550      ;
; -0.406 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[8]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.112      ; 1.550      ;
; -0.404 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|dacdat                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.087      ; 1.523      ;
; -0.402 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[3]  ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.000      ; 1.434      ;
; -0.402 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[4]  ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.000      ; 1.434      ;
; -0.402 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[2]  ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.000      ; 1.434      ;
; -0.402 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[1]  ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.000      ; 1.434      ;
; -0.402 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[0]  ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.000      ; 1.434      ;
; -0.401 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[17]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.122      ; 1.555      ;
; -0.401 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[16]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.122      ; 1.555      ;
; -0.401 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[15]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.122      ; 1.555      ;
; -0.401 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[14]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.122      ; 1.555      ;
; -0.401 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[13]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.122      ; 1.555      ;
; -0.401 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[12]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.122      ; 1.555      ;
; -0.401 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[11]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.122      ; 1.555      ;
; -0.401 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[10]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.122      ; 1.555      ;
; -0.399 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[16]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.115      ; 1.546      ;
; -0.399 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[15]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.115      ; 1.546      ;
; -0.399 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[14]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.115      ; 1.546      ;
; -0.399 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[13]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.115      ; 1.546      ;
; -0.399 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[12]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.115      ; 1.546      ;
; -0.399 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[11]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.115      ; 1.546      ;
; -0.399 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[10]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.115      ; 1.546      ;
; -0.399 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[9]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.115      ; 1.546      ;
; -0.386 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[1] ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.000      ; 1.418      ;
; -0.380 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[4] ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.000      ; 1.412      ;
; -0.370 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.759      ;
; -0.370 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.759      ;
; -0.370 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.759      ;
; -0.370 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.759      ;
; -0.370 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.759      ;
; -0.370 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.759      ;
; -0.370 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.759      ;
; -0.370 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]                      ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.759      ;
; -0.370 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]                      ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.759      ;
; -0.370 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]                      ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.759      ;
; -0.370 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]                      ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.759      ;
; -0.370 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]                      ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.759      ;
; -0.370 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]                      ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.759      ;
; -0.370 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[14]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.759      ;
; -0.370 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[15]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.759      ;
; -0.370 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.357      ; 1.759      ;
; -0.353 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[23]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.059      ; 1.444      ;
; -0.353 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[22]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.059      ; 1.444      ;
; -0.353 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[21]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.059      ; 1.444      ;
; -0.353 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[20]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.059      ; 1.444      ;
; -0.353 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[19]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.059      ; 1.444      ;
; -0.353 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[18]          ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.059      ; 1.444      ;
; -0.353 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[9]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.059      ; 1.444      ;
; -0.353 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[8]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.059      ; 1.444      ;
; -0.352 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[7]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.058      ; 1.442      ;
; -0.352 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[6]           ; AUD_BCLK                                               ; AUD_BCLK    ; 1.000        ; 0.058      ; 1.442      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------+-------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Setup: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'                                                                                                                                                                                                                                ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                 ; To Node                                                                       ; Launch Clock                                        ; Latch Clock                                            ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; 1.951 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[7]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[7]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.752      ; 0.833      ;
; 1.955 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[9]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[9]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.751      ; 0.828      ;
; 1.957 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[22] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[22] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.752      ; 0.827      ;
; 1.960 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[21] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[21] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.752      ; 0.824      ;
; 1.961 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[8]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[8]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.751      ; 0.822      ;
; 1.994 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[18] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[18] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.752      ; 0.790      ;
; 1.997 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[4]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.741      ; 0.776      ;
; 2.028 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[20] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[20] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.752      ; 0.756      ;
; 2.033 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[12] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[12] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.751      ; 0.750      ;
; 2.037 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[17] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[17] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.752      ; 0.747      ;
; 2.040 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[15] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[15] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.751      ; 0.743      ;
; 2.042 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[11] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[11] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.751      ; 0.741      ;
; 2.043 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[16] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[16] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.752      ; 0.741      ;
; 2.045 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[13] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[13] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.751      ; 0.738      ;
; 2.045 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[10] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[10] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.751      ; 0.738      ;
; 2.057 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[5]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[5]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.741      ; 0.716      ;
; 2.058 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[6]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[6]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.748      ; 0.722      ;
; 2.069 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[14] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[14] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.744      ; 0.707      ;
; 2.081 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[3]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[3]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.741      ; 0.692      ;
; 2.082 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[2]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[2]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.741      ; 0.691      ;
; 2.084 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[1]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[1]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.741      ; 0.689      ;
; 2.089 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[0]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[0]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.741      ; 0.684      ;
; 2.184 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[19] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[19] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.745      ; 0.593      ;
; 2.301 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[23] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[23] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.746      ; 0.477      ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Setup: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'                                                                                                                                                                                                                                ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                 ; To Node                                                                       ; Launch Clock                                        ; Latch Clock                                            ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; 2.195 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[21] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[21] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.819      ; 0.656      ;
; 2.195 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[19] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[19] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.819      ; 0.656      ;
; 2.195 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[17] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[17] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.819      ; 0.656      ;
; 2.200 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[8]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[8]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.819      ; 0.651      ;
; 2.278 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[23] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[23] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.818      ; 0.572      ;
; 2.280 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[22] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[22] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.819      ; 0.571      ;
; 2.280 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[20] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[20] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.819      ; 0.571      ;
; 2.280 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[18] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[18] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.819      ; 0.571      ;
; 2.287 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[7]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[7]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.824      ; 0.569      ;
; 2.296 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[11] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[11] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.820      ; 0.556      ;
; 2.305 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[16] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[16] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.820      ; 0.547      ;
; 2.365 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[2]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[2]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.823      ; 0.490      ;
; 2.375 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[9]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[9]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.820      ; 0.477      ;
; 2.376 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[14] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[14] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.820      ; 0.476      ;
; 2.377 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[15] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[15] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.820      ; 0.475      ;
; 2.377 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[13] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[13] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.820      ; 0.475      ;
; 2.378 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[5]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[5]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.823      ; 0.477      ;
; 2.378 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[0]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[0]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.823      ; 0.477      ;
; 2.379 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[10] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[10] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.820      ; 0.473      ;
; 2.381 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[1]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[1]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.823      ; 0.474      ;
; 2.382 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[12] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[12] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.820      ; 0.470      ;
; 2.384 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[6]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[6]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.823      ; 0.471      ;
; 2.385 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[3]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[3]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.823      ; 0.470      ;
; 2.392 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[4]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.823      ; 0.463      ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Setup: 'CLOCK_27'                                                                                                                                                             ;
+--------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
; Slack  ; From Node                                           ; To Node                                             ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
; 34.784 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.285      ;
; 34.863 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.206      ;
; 34.864 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.205      ;
; 34.865 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.204      ;
; 34.865 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.204      ;
; 34.867 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.202      ;
; 34.867 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 2.203      ;
; 34.870 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.199      ;
; 34.871 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.198      ;
; 34.873 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.196      ;
; 34.874 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.195      ;
; 34.876 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[13] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.193      ;
; 34.877 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.192      ;
; 34.880 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.189      ;
; 34.880 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[14] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.189      ;
; 34.881 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.188      ;
; 34.883 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.186      ;
; 34.895 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.006      ; 2.180      ;
; 34.895 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.006      ; 2.180      ;
; 34.899 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[17] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.006      ; 2.176      ;
; 34.909 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 2.161      ;
; 34.917 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.005      ; 2.157      ;
; 34.918 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.005      ; 2.156      ;
; 34.926 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.002      ; 2.145      ;
; 34.942 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 2.128      ;
; 34.995 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.005      ; 2.079      ;
; 35.000 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.069      ;
; 35.043 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 2.025      ;
; 35.044 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 2.024      ;
; 35.058 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.011      ;
; 35.065 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.004      ;
; 35.083 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 1.987      ;
; 35.094 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|reset             ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.973      ;
; 35.094 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.002      ; 1.977      ;
; 35.098 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.971      ;
; 35.114 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.955      ;
; 35.114 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.005      ; 1.960      ;
; 35.125 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 1.945      ;
; 35.140 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.927      ;
; 35.142 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.002      ; 1.929      ;
; 35.158 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 1.912      ;
; 35.166 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 1.902      ;
; 35.178 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[14] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.891      ;
; 35.185 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.005      ; 1.889      ;
; 35.197 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.006      ; 1.878      ;
; 35.200 ; clock_generator:clock_generator_1|start_counter[15] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.869      ;
; 35.201 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.868      ;
; 35.202 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.005      ; 1.872      ;
; 35.216 ; clock_generator:clock_generator_1|start_counter[13] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.853      ;
; 35.226 ; clock_generator:clock_generator_1|start_counter[11] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.843      ;
; 35.228 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.841      ;
; 35.228 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.006      ; 1.847      ;
; 35.239 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.006      ; 1.836      ;
; 35.252 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.817      ;
; 35.256 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.007      ; 1.820      ;
; 35.259 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.804      ;
; 35.260 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.803      ;
; 35.261 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.806      ;
; 35.261 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.802      ;
; 35.261 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.802      ;
; 35.261 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[14] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 1.809      ;
; 35.263 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.800      ;
; 35.266 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.803      ;
; 35.266 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.803      ;
; 35.266 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.797      ;
; 35.267 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.802      ;
; 35.267 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.796      ;
; 35.268 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.801      ;
; 35.268 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.801      ;
; 35.268 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.006      ; 1.807      ;
; 35.269 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.794      ;
; 35.270 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.799      ;
; 35.270 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.793      ;
; 35.272 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[13] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.791      ;
; 35.272 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.006      ; 1.803      ;
; 35.273 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.796      ;
; 35.273 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.790      ;
; 35.273 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.796      ;
; 35.274 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.795      ;
; 35.274 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.795      ;
; 35.274 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.795      ;
; 35.275 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.794      ;
; 35.275 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.794      ;
; 35.276 ; clock_generator:clock_generator_1|start_counter[12] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.793      ;
; 35.276 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.793      ;
; 35.276 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.787      ;
; 35.276 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[14] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.787      ;
; 35.277 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.792      ;
; 35.277 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.786      ;
; 35.277 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.792      ;
; 35.278 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.785      ;
; 35.279 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[13] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.790      ;
; 35.279 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.784      ;
; 35.279 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.784      ;
; 35.280 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.789      ;
; 35.280 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.783      ;
; 35.280 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.783      ;
; 35.280 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.789      ;
; 35.281 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.788      ;
; 35.282 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.006     ; 1.781      ;
+--------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Setup: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'                                                                                                                                                                                                                                            ;
+--------+-------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                               ; To Node                                                                    ; Launch Clock                                        ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+-------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; 98.899 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.133      ;
; 98.943 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.089      ;
; 98.951 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.081      ;
; 98.957 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.075      ;
; 98.968 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.064      ;
; 98.997 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.035      ;
; 99.056 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.976      ;
; 99.070 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.962      ;
; 99.078 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.954      ;
; 99.096 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.936      ;
; 99.110 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.922      ;
; 99.131 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.901      ;
; 99.148 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.884      ;
; 99.165 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.867      ;
; 99.166 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.866      ;
; 99.183 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.849      ;
; 99.191 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.841      ;
; 99.197 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.835      ;
; 99.200 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.832      ;
; 99.200 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.832      ;
; 99.218 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.814      ;
; 99.235 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.797      ;
; 99.235 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.797      ;
; 99.256 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.776      ;
; 99.260 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.772      ;
; 99.270 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.762      ;
; 99.291 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.741      ;
; 99.292 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.740      ;
; 99.295 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.737      ;
; 99.312 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.720      ;
; 99.322 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.710      ;
; 99.326 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.706      ;
; 99.328 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.704      ;
; 99.329 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.703      ;
; 99.330 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.702      ;
; 99.341 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.691      ;
; 99.347 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.685      ;
; 99.363 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.669      ;
; 99.364 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.668      ;
; 99.364 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.668      ;
; 99.365 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.667      ;
; 99.382 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.650      ;
; 99.384 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.648      ;
; 99.407 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.625      ;
; 99.458 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.574      ;
; 99.499 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.533      ;
; 99.503 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.529      ;
; 99.504 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.528      ;
; 99.504 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.528      ;
; 99.505 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.527      ;
; 99.519 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.513      ;
; 99.520 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.512      ;
; 99.522 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.510      ;
; 99.573 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.459      ;
+--------+-------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Hold: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'                                                                                                                                                                                                                                  ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                 ; To Node                                                                       ; Launch Clock                                        ; Latch Clock                                            ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; -1.512 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[4]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.823      ; 0.463      ;
; -1.505 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[3]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[3]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.823      ; 0.470      ;
; -1.504 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[6]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[6]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.823      ; 0.471      ;
; -1.502 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[12] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[12] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.820      ; 0.470      ;
; -1.501 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[1]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[1]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.823      ; 0.474      ;
; -1.499 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[10] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[10] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.820      ; 0.473      ;
; -1.498 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[5]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[5]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.823      ; 0.477      ;
; -1.498 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[0]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[0]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.823      ; 0.477      ;
; -1.497 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[15] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[15] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.820      ; 0.475      ;
; -1.497 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[13] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[13] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.820      ; 0.475      ;
; -1.496 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[14] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[14] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.820      ; 0.476      ;
; -1.495 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[9]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[9]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.820      ; 0.477      ;
; -1.485 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[2]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[2]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.823      ; 0.490      ;
; -1.425 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[16] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[16] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.820      ; 0.547      ;
; -1.416 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[11] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[11] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.820      ; 0.556      ;
; -1.407 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[7]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[7]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.824      ; 0.569      ;
; -1.400 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[22] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[22] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.819      ; 0.571      ;
; -1.400 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[20] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[20] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.819      ; 0.571      ;
; -1.400 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[18] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[18] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.819      ; 0.571      ;
; -1.398 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[23] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[23] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.818      ; 0.572      ;
; -1.320 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[8]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[8]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.819      ; 0.651      ;
; -1.315 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[21] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[21] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.819      ; 0.656      ;
; -1.315 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[19] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[19] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.819      ; 0.656      ;
; -1.315 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[17] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[17] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.819      ; 0.656      ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Hold: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'                                                                                                                                                                                                                                  ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                 ; To Node                                                                       ; Launch Clock                                        ; Latch Clock                                            ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; -1.421 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[23] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[23] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.746      ; 0.477      ;
; -1.304 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[19] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[19] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.745      ; 0.593      ;
; -1.209 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[0]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[0]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.741      ; 0.684      ;
; -1.204 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[1]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[1]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.741      ; 0.689      ;
; -1.202 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[2]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[2]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.741      ; 0.691      ;
; -1.201 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[3]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[3]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.741      ; 0.692      ;
; -1.189 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[14] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[14] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.744      ; 0.707      ;
; -1.178 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[6]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[6]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.748      ; 0.722      ;
; -1.177 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[5]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[5]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.741      ; 0.716      ;
; -1.165 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[13] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[13] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.751      ; 0.738      ;
; -1.165 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[10] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[10] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.751      ; 0.738      ;
; -1.163 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[16] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[16] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.752      ; 0.741      ;
; -1.162 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[11] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[11] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.751      ; 0.741      ;
; -1.160 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[15] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[15] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.751      ; 0.743      ;
; -1.157 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[17] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[17] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.752      ; 0.747      ;
; -1.153 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[12] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[12] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.751      ; 0.750      ;
; -1.148 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[20] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[20] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.752      ; 0.756      ;
; -1.117 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[4]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.741      ; 0.776      ;
; -1.114 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[18] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[18] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.752      ; 0.790      ;
; -1.081 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[8]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[8]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.751      ; 0.822      ;
; -1.080 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[21] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[21] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.752      ; 0.824      ;
; -1.077 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[22] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[22] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.752      ; 0.827      ;
; -1.075 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[9]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[9]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.751      ; 0.828      ;
; -1.071 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[7]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[7]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.752      ; 0.833      ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Hold: 'AUD_BCLK'                                                                                                                                                                                                                                                        ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                          ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
; -0.061 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[7]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.336      ; 0.427      ;
; -0.061 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[12]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.336      ; 0.427      ;
; -0.057 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[10]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.336      ; 0.431      ;
; -0.056 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[9]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.336      ; 0.432      ;
; -0.053 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[6]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.336      ; 0.435      ;
; -0.053 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.336      ; 0.435      ;
; -0.053 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.336      ; 0.435      ;
; 0.081  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.357      ; 0.590      ;
; 0.082  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.357      ; 0.591      ;
; 0.086  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.357      ; 0.595      ;
; 0.086  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.357      ; 0.595      ;
; 0.088  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.357      ; 0.597      ;
; 0.088  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.357      ; 0.597      ;
; 0.096  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.357      ; 0.605      ;
; 0.096  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.357      ; 0.605      ;
; 0.099  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.357      ; 0.608      ;
; 0.099  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.357      ; 0.608      ;
; 0.130  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[13]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.336      ; 0.618      ;
; 0.164  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[10]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.300      ; 0.616      ;
; 0.164  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[13]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.300      ; 0.616      ;
; 0.173  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[23]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.181      ; 0.506      ;
; 0.174  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[22]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.181      ; 0.507      ;
; 0.175  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[0]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.181      ; 0.508      ;
; 0.202  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[15]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.357      ; 0.711      ;
; 0.213  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.357      ; 0.722      ;
; 0.215  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enl                          ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enl                          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.367      ;
; 0.215  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enr                          ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enr                          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.367      ;
; 0.217  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.357      ; 0.726      ;
; 0.217  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[14]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.357      ; 0.726      ;
; 0.217  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.357      ; 0.726      ;
; 0.218  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.357      ; 0.727      ;
; 0.222  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[20]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.289      ; 0.663      ;
; 0.224  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[21]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.289      ; 0.665      ;
; 0.229  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[11]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.300      ; 0.681      ;
; 0.229  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[12]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.300      ; 0.681      ;
; 0.239  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[6]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[7]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.391      ;
; 0.241  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[5]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[6]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.393      ;
; 0.279  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[4]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.194      ; 0.625      ;
; 0.281  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[3]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.194      ; 0.627      ;
; 0.282  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[1]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.194      ; 0.628      ;
; 0.282  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[5]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.194      ; 0.628      ;
; 0.282  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enr                          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.434      ;
; 0.288  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[17]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[18]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.440      ;
; 0.288  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[2]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[3]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.440      ;
; 0.288  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[1]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[2]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.440      ;
; 0.290  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[2]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.300      ; 0.742      ;
; 0.290  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[3]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[4]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.442      ;
; 0.292  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[9]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.300      ; 0.744      ;
; 0.297  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[5]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.300      ; 0.749      ;
; 0.302  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[14]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.289      ; 0.743      ;
; 0.302  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[10]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.300      ; 0.754      ;
; 0.302  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[9]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.300      ; 0.754      ;
; 0.304  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[22]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.181      ; 0.637      ;
; 0.305  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[23]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.181      ; 0.638      ;
; 0.306  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[0]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.181      ; 0.639      ;
; 0.306  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[12]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.300      ; 0.758      ;
; 0.309  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[13]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.300      ; 0.761      ;
; 0.309  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[11]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.300      ; 0.761      ;
; 0.313  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[14]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[15]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.465      ;
; 0.325  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[4] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[4] ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.477      ;
; 0.327  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enl                          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.479      ;
; 0.347  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[18]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.289      ; 0.788      ;
; 0.347  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[19]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.289      ; 0.788      ;
; 0.348  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[17]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.289      ; 0.789      ;
; 0.352  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[15]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.289      ; 0.793      ;
; 0.352  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[16]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.289      ; 0.793      ;
; 0.352  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[14]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.289      ; 0.793      ;
; 0.355  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[21]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[22]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.507      ;
; 0.356  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[20]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[21]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.508      ;
; 0.356  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[1]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[1]  ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.508      ;
; 0.357  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.509      ;
; 0.357  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[13]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[14]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.509      ;
; 0.358  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]              ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.510      ;
; 0.358  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[4]  ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.510      ;
; 0.358  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.510      ;
; 0.358  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[1] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[1] ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.510      ;
; 0.359  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[15]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[16]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.511      ;
; 0.359  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[10]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[11]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.511      ;
; 0.359  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[9]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[10]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.511      ;
; 0.359  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[8]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[9]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.511      ;
; 0.360  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[22]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[23]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.512      ;
; 0.360  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[12]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[13]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.512      ;
; 0.361  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.513      ;
; 0.361  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[20]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[21]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.513      ;
; 0.361  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[12]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[13]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.513      ;
; 0.361  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[11]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[12]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.513      ;
; 0.361  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[11]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[12]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.513      ;
; 0.362  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]                      ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.514      ;
; 0.362  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.514      ;
; 0.362  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[6]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[7]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.514      ;
; 0.362  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[1]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[2]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.514      ;
; 0.363  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[18]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[19]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.515      ;
; 0.364  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[21]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[22]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.516      ;
; 0.364  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[10]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[11]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.516      ;
; 0.366  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[5]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[6]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.518      ;
; 0.367  ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[2]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[2]              ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.519      ;
; 0.367  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[18]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[19]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.519      ;
; 0.367  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[14]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[15]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.519      ;
; 0.367  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[4]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[5]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.519      ;
; 0.369  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.521      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Hold: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'                                                                                                                                                                                                                                            ;
+-------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+--------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                               ; To Node                                                                 ; Launch Clock                                           ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+--------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; 0.022 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.052      ; 0.367      ;
; 0.022 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.052      ; 0.367      ;
; 0.215 ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[4]                    ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[4]                    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[2]                    ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[2]                    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[0]                    ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[0]                    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[3]                    ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[3]                    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[1]                    ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[1]                    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[0]                      ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[0]                      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[2]                      ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[2]                      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[1]                      ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[1]                      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|lcd_controller:lcd_controller_1|start                         ; MMI:MMI_1|lcd_controller:lcd_controller_1|start                         ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[3]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[3]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[0]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[0]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[2]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[2]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[7]      ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[7]      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[23]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[23]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[7]       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[7]       ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[22]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[22]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[7] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[7] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[0] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[1] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[2] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[2] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[3] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[3] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[1] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[2] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[2] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[4] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[4] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[5] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[5] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[6] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[6] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[21]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[21]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[20]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[20]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[54]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[54]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[56]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[56]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[60]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[60]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[54]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[54]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[58]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[58]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[59]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[59]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[17]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[17]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[20]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[20]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[20]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[20]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[21]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[21]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[21]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[21]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[22]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[22]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[22]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[22]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[23]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[23]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[23]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[23]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[20]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[20]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[20]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[20]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[20]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[20]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[20]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[20]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[21]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[21]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[21]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[21]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[21]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[21]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[21]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[21]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[22]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[22]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[22]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[22]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[22]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[22]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[22]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[22]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[23]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[23]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[23]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[23]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[23]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[23]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[23]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[23]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[16]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[16]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_12[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_12[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_10[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_10[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_14[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_14[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_13[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_13[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_7[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_7[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_5[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_5[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_12[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_12[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_11[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_11[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_3[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_3[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_4[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_4[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_10[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_10[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_12[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_12[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_11[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_11[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_12[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_12[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_4[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_4[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_3[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_3[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_7[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_7[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_5[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_5[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_14[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_14[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_13[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_13[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_12[20]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_12[20]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_10[20]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_10[20]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_5[20]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_5[20]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_7[20]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_7[20]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
+-------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+--------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Hold: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                                                                                                                                              ;
+-------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                  ; To Node                                                                   ; Launch Clock                                        ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+-------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende            ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.247 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.399      ;
; 0.264 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.416      ;
; 0.264 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.416      ;
; 0.265 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.417      ;
; 0.265 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.417      ;
; 0.292 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.444      ;
; 0.304 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.456      ;
; 0.305 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.457      ;
; 0.315 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.467      ;
; 0.328 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.480      ;
; 0.329 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.481      ;
; 0.338 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.490      ;
; 0.370 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.522      ;
; 0.382 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.534      ;
; 0.384 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.536      ;
; 0.385 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.537      ;
; 0.392 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.544      ;
; 0.393 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.545      ;
; 0.420 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.572      ;
; 0.424 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.576      ;
; 0.433 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.585      ;
; 0.434 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.586      ;
; 0.440 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.592      ;
; 0.444 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.596      ;
; 0.451 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.001     ; 0.602      ;
; 0.451 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.001     ; 0.602      ;
; 0.453 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.605      ;
; 0.454 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 0.607      ;
; 0.456 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.608      ;
; 0.460 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.001     ; 0.611      ;
; 0.460 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.001     ; 0.611      ;
; 0.496 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.001     ; 0.647      ;
; 0.497 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.035     ; 0.614      ;
; 0.499 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.035     ; 0.616      ;
; 0.500 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.006      ; 0.658      ;
; 0.505 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.507 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.005     ; 0.654      ;
; 0.531 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.005      ; 0.688      ;
; 0.540 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.692      ;
; 0.551 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.703      ;
; 0.556 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.708      ;
; 0.566 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.718      ;
; 0.567 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.719      ;
; 0.574 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.726      ;
; 0.576 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 0.729      ;
; 0.577 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 0.730      ;
; 0.579 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.006      ; 0.737      ;
; 0.588 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.005     ; 0.735      ;
; 0.591 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.005     ; 0.738      ;
; 0.603 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 0.756      ;
; 0.604 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.756      ;
; 0.604 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.006      ; 0.762      ;
; 0.624 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.036     ; 0.740      ;
; 0.624 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.006      ; 0.782      ;
; 0.626 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.778      ;
; 0.643 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 0.796      ;
; 0.644 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.041     ; 0.755      ;
; 0.644 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.041     ; 0.755      ;
; 0.644 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.041     ; 0.755      ;
; 0.644 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.041     ; 0.755      ;
; 0.644 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.041     ; 0.755      ;
; 0.644 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.041     ; 0.755      ;
; 0.644 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.041     ; 0.755      ;
; 0.644 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.041     ; 0.755      ;
; 0.660 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.006      ; 0.818      ;
; 0.661 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 0.814      ;
; 0.662 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 0.815      ;
; 0.682 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 0.835      ;
; 0.683 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.835      ;
; 0.684 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.036     ; 0.800      ;
; 0.685 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.837      ;
; 0.694 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.846      ;
; 0.700 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.852      ;
; 0.721 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.006      ; 0.879      ;
; 0.726 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.001     ; 0.877      ;
; 0.728 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.001     ; 0.879      ;
; 0.736 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 0.889      ;
; 0.736 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.888      ;
; 0.738 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.890      ;
; 0.738 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.890      ;
; 0.761 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 0.914      ;
; 0.764 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende            ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.001      ; 0.917      ;
; 0.765 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.035     ; 0.882      ;
; 0.765 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.035     ; 0.882      ;
; 0.774 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.036     ; 0.890      ;
; 0.774 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.036     ; 0.890      ;
; 0.792 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.036     ; 0.908      ;
; 0.794 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.036     ; 0.910      ;
; 0.807 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.041     ; 0.918      ;
+-------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Hold: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'                                                                                                                                                                                                                                            ;
+-------+-------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                               ; To Node                                                                    ; Launch Clock                                        ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; 0.303 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.455      ;
; 0.307 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.459      ;
; 0.358 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.510      ;
; 0.360 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.512      ;
; 0.361 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.513      ;
; 0.375 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.527      ;
; 0.376 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.528      ;
; 0.376 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.528      ;
; 0.377 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.529      ;
; 0.381 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.533      ;
; 0.422 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.574      ;
; 0.473 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.625      ;
; 0.496 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.648      ;
; 0.498 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.650      ;
; 0.515 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.667      ;
; 0.516 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.668      ;
; 0.516 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.668      ;
; 0.517 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.669      ;
; 0.533 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.685      ;
; 0.537 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.689      ;
; 0.539 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.691      ;
; 0.541 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.693      ;
; 0.550 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.702      ;
; 0.551 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.703      ;
; 0.552 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.704      ;
; 0.554 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.706      ;
; 0.558 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.710      ;
; 0.568 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.720      ;
; 0.585 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.737      ;
; 0.589 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.741      ;
; 0.610 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.762      ;
; 0.620 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.772      ;
; 0.624 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.776      ;
; 0.645 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.797      ;
; 0.645 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.797      ;
; 0.654 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.806      ;
; 0.662 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.814      ;
; 0.673 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.825      ;
; 0.680 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.832      ;
; 0.680 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.832      ;
; 0.689 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.841      ;
; 0.693 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.845      ;
; 0.697 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.849      ;
; 0.714 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.866      ;
; 0.715 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.867      ;
; 0.732 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.884      ;
; 0.749 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.901      ;
; 0.749 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.901      ;
; 0.770 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.922      ;
; 0.784 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.936      ;
; 0.810 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.962      ;
; 0.821 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.973      ;
; 0.824 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.976      ;
; 0.877 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3] ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.029      ;
+-------+-------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Hold: 'CLOCK_27'                                                                                                                                                             ;
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
; Slack ; From Node                                           ; To Node                                             ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
; 0.458 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.610      ;
; 0.522 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.674      ;
; 0.522 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.674      ;
; 0.531 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.683      ;
; 0.570 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.722      ;
; 0.575 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.727      ;
; 0.658 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.810      ;
; 0.661 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.813      ;
; 0.680 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.832      ;
; 0.680 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[17] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.832      ;
; 0.693 ; clock_generator:clock_generator_1|start_counter[11] ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.845      ;
; 0.699 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.851      ;
; 0.700 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.852      ;
; 0.713 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.865      ;
; 0.715 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.867      ;
; 0.718 ; clock_generator:clock_generator_1|start_counter[12] ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.870      ;
; 0.743 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.895      ;
; 0.743 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 0.896      ;
; 0.749 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.901      ;
; 0.776 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 0.929      ;
; 0.785 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.937      ;
; 0.789 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.941      ;
; 0.790 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.942      ;
; 0.790 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.942      ;
; 0.792 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.944      ;
; 0.796 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.948      ;
; 0.805 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.957      ;
; 0.809 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 0.960      ;
; 0.817 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 0.967      ;
; 0.818 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 0.971      ;
; 0.824 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 0.978      ;
; 0.826 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 0.977      ;
; 0.827 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 0.978      ;
; 0.844 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.996      ;
; 0.860 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.012      ;
; 0.860 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 1.011      ;
; 0.864 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.018      ;
; 0.866 ; clock_generator:clock_generator_1|start_counter[11] ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.018      ;
; 0.870 ; clock_generator:clock_generator_1|start_counter[18] ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 1.020      ;
; 0.877 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.029      ;
; 0.877 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.029      ;
; 0.896 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.048      ;
; 0.897 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 1.048      ;
; 0.897 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.051      ;
; 0.900 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.052      ;
; 0.902 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 1.053      ;
; 0.908 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.060      ;
; 0.912 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 1.063      ;
; 0.924 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.076      ;
; 0.926 ; clock_generator:clock_generator_1|start_counter[18] ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.078      ;
; 0.926 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.078      ;
; 0.928 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 1.078      ;
; 0.928 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.082      ;
; 0.931 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.083      ;
; 0.933 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.085      ;
; 0.936 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.088      ;
; 0.938 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 1.088      ;
; 0.942 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.006     ; 1.088      ;
; 0.957 ; clock_generator:clock_generator_1|start_counter[19] ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.006      ; 1.115      ;
; 0.957 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.109      ;
; 0.964 ; clock_generator:clock_generator_1|start_counter[18] ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.006      ; 1.122      ;
; 0.964 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 1.114      ;
; 0.964 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.116      ;
; 0.965 ; clock_generator:clock_generator_1|start_counter[18] ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 1.116      ;
; 0.969 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.121      ;
; 0.976 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 1.129      ;
; 0.978 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.130      ;
; 0.980 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.132      ;
; 0.980 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.132      ;
; 0.981 ; clock_generator:clock_generator_1|start_counter[19] ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 1.131      ;
; 0.984 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|reset             ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 1.134      ;
; 0.985 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 1.135      ;
; 0.988 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 1.141      ;
; 0.988 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.140      ;
; 0.991 ; clock_generator:clock_generator_1|start_counter[18] ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 1.141      ;
; 0.992 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.146      ;
; 0.993 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.005      ; 1.150      ;
; 0.994 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.146      ;
; 0.998 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.152      ;
; 1.000 ; clock_generator:clock_generator_1|start_counter[12] ; clock_generator:clock_generator_1|start_counter[17] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.006      ; 1.158      ;
; 1.000 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.152      ;
; 1.004 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.158      ;
; 1.006 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 1.157      ;
; 1.009 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 1.162      ;
; 1.010 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 1.160      ;
; 1.010 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.005      ; 1.167      ;
; 1.011 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 1.164      ;
; 1.014 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 1.165      ;
; 1.016 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 1.169      ;
; 1.021 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 1.174      ;
; 1.023 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 1.174      ;
; 1.024 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|start_counter[17] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.006      ; 1.182      ;
; 1.026 ; clock_generator:clock_generator_1|start_counter[12] ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 1.176      ;
; 1.027 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.179      ;
; 1.027 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.181      ;
; 1.031 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 1.182      ;
; 1.032 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.186      ;
; 1.032 ; clock_generator:clock_generator_1|start_counter[13] ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 1.182      ;
; 1.034 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 1.185      ;
; 1.034 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.186      ;
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Recovery: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                                                                ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                               ; To Node                                                                   ; Launch Clock ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; 6.072 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.608     ; 1.611      ;
; 6.072 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.608     ; 1.611      ;
; 6.072 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.608     ; 1.611      ;
; 6.072 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.608     ; 1.611      ;
; 6.072 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.608     ; 1.611      ;
; 6.072 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.608     ; 1.611      ;
; 6.077 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.607     ; 1.607      ;
; 6.077 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.607     ; 1.607      ;
; 6.077 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.607     ; 1.607      ;
; 6.077 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.607     ; 1.607      ;
; 6.192 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.613     ; 1.486      ;
; 6.192 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.613     ; 1.486      ;
; 6.192 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.613     ; 1.486      ;
; 6.192 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.613     ; 1.486      ;
; 6.192 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.613     ; 1.486      ;
; 6.192 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.613     ; 1.486      ;
; 6.192 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.613     ; 1.486      ;
; 6.192 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.613     ; 1.486      ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Removal: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                                                                 ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                               ; To Node                                                                   ; Launch Clock ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; 2.948 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.613     ; 1.486      ;
; 2.948 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.613     ; 1.486      ;
; 2.948 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.613     ; 1.486      ;
; 2.948 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.613     ; 1.486      ;
; 2.948 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.613     ; 1.486      ;
; 2.948 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.613     ; 1.486      ;
; 2.948 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.613     ; 1.486      ;
; 2.948 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.613     ; 1.486      ;
; 3.063 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.607     ; 1.607      ;
; 3.063 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.607     ; 1.607      ;
; 3.063 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.607     ; 1.607      ;
; 3.063 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.607     ; 1.607      ;
; 3.068 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.608     ; 1.611      ;
; 3.068 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.608     ; 1.611      ;
; 3.068 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.608     ; 1.611      ;
; 3.068 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.608     ; 1.611      ;
; 3.068 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.608     ; 1.611      ;
; 3.068 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.608     ; 1.611      ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width: 'AUD_BCLK'                                                                                                                               ;
+--------+--------------+----------------+------------------+----------+------------+--------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                                               ;
+--------+--------------+----------------+------------------+----------+------------+--------------------------------------------------------------------------------------+
; -1.222 ; 1.000        ; 2.222          ; Port Rate        ; AUD_BCLK ; Rise       ; AUD_BCLK                                                                             ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[0]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[0]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[2]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[2]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[0] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[0] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[10]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[10]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[12]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[12]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[13]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[13]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[14]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[14]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[15]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[15]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[6]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[6]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[7]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[7]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[9]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[9]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[0]            ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[0]            ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[10]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[10]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[11]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[11]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[12]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[12]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[13]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[13]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[14]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[14]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[15]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[15]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[16]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[16]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[17]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[17]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[18]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[18]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[19]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[19]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[1]            ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[1]            ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[20]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[20]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[21]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[21]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[22]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[22]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[23]           ;
+--------+--------------+----------------+------------------+----------+------------+--------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'                                                                                                                        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                  ; Clock Edge ; Target                                                                        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[0]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[0]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[10] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[10] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[11] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[11] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[12] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[12] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[13] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[13] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[14] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[14] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[15] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[15] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[16] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[16] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[17] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[17] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[18] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[18] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[19] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[19] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[1]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[1]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[20] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[20] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[21] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[21] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[22] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[22] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[23] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[23] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[2]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[2]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[3]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[3]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[4]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[4]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[5]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[5]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[6]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[6]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[7]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[7]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[8]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[8]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[9]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[9]  ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[0]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[0]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[10]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[10]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[11]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[11]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[12]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[12]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[13]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[13]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[14]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[14]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[15]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[15]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[16]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[16]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[17]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[17]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[18]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[18]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[19]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[19]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[1]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[1]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[20]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[20]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[21]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[21]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[22]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[22]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[23]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[23]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[2]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[2]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[3]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[3]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[4]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[4]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[5]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[5]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[6]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[6]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[7]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[7]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[8]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[8]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[9]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[9]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|filter_unit_1|enql|regout                                        ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|filter_unit_1|enql|regout                                        ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|filter_unit_1|enql~clkctrl|inclk[0]                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|filter_unit_1|enql~clkctrl|inclk[0]                              ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'                                                                                                                        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                  ; Clock Edge ; Target                                                                        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[0]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[0]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[10] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[10] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[11] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[11] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[12] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[12] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[13] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[13] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[14] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[14] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[15] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[15] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[16] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[16] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[17] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[17] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[18] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[18] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[19] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[19] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[1]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[1]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[20] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[20] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[21] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[21] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[22] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[22] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[23] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[23] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[2]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[2]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[3]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[3]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[4]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[4]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[5]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[5]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[6]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[6]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[7]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[7]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[8]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[8]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[9]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[9]  ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[0]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[0]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[10]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[10]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[11]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[11]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[12]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[12]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[13]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[13]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[14]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[14]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[15]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[15]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[16]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[16]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[17]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[17]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[18]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[18]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[19]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[19]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[1]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[1]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[20]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[20]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[21]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[21]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[22]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[22]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[23]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[23]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[2]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[2]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[3]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[3]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[4]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[4]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[5]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[5]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[6]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[6]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[7]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[7]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[8]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[8]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[9]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[9]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|filter_unit_1|enqr|regout                                        ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|filter_unit_1|enqr|regout                                        ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|filter_unit_1|enqr~clkctrl|inclk[0]                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|filter_unit_1|enqr~clkctrl|inclk[0]                              ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'                                                                                                                                                                ;
+-------+--------------+----------------+------------------+-----------------------------------------------------+------------+------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                               ; Clock Edge ; Target                                                                                                                 ;
+-------+--------------+----------------+------------------+-----------------------------------------------------+------------+------------------------------------------------------------------------------------------------------------------------+
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[30]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[30]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[30]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[30]~_Duplicate_1 ;
+-------+--------------+----------------+------------------+-----------------------------------------------------+------------+------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width: 'CLOCK_50'                                                                                                ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+
; 10.000 ; 10.000       ; 0.000          ; High Pulse Width ; CLOCK_50 ; Rise       ; CLOCK_50|combout                                      ;
; 10.000 ; 10.000       ; 0.000          ; Low Pulse Width  ; CLOCK_50 ; Rise       ; CLOCK_50|combout                                      ;
; 10.000 ; 10.000       ; 0.000          ; High Pulse Width ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0]   ;
; 10.000 ; 10.000       ; 0.000          ; Low Pulse Width  ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0]   ;
; 10.000 ; 10.000       ; 0.000          ; High Pulse Width ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[1]   ;
; 10.000 ; 10.000       ; 0.000          ; Low Pulse Width  ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[1]   ;
; 10.000 ; 10.000       ; 0.000          ; High Pulse Width ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|inclk[0] ;
; 10.000 ; 10.000       ; 0.000          ; Low Pulse Width  ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|inclk[0] ;
; 17.620 ; 20.000       ; 2.380          ; Port Rate        ; CLOCK_50 ; Rise       ; CLOCK_50                                              ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width: 'CLOCK_27'                                                                                                ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|reset               ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[0]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[10]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[11]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[12]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[13]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[14]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[15]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[16]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[17]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[18]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[19]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[1]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[20]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[21]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[22]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[23]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[24]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[25]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[2]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[3]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[4]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[5]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[6]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[7]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[8]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[9]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|reset               ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[0]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[10]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[11]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[12]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[13]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[14]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[15]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[16]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[17]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[18]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[19]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[1]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[20]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[21]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[22]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[23]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[24]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[25]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[2]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[3]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[4]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[5]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[6]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[7]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[8]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[9]    ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; CLOCK_27|combout                                      ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; CLOCK_27~clkctrl|inclk[0]                             ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; CLOCK_27~clkctrl|outclk                               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1]   ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|inclk[0] ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|reset|clk                           ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[0]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[10]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[11]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[12]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[13]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[14]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[15]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[16]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[17]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[18]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[19]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[1]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[20]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[21]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[22]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[23]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[24]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[25]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[2]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[3]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[4]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[5]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[6]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[7]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[8]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[9]|clk                ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; CLOCK_27|combout                                      ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; CLOCK_27~clkctrl|inclk[0]                             ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; CLOCK_27~clkctrl|outclk                               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1]   ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|inclk[0] ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|reset|clk                           ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[0]|clk                ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[10]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[11]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[12]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[13]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[14]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[15]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[16]|clk               ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                    ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+---------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                               ; Clock Edge ; Target                                                                    ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+---------------------------------------------------------------------------+
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[0]|clk                               ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[1]|clk                               ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[2]|clk                               ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[3]|clk                               ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[0]|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[1]|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[2]|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[3]|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SCLK|clk                                        ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SDIN~en|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SDIN~reg0|clk                                   ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Sektion[0]|clk                                  ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Sektion[1]|clk                                  ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack_warten2|clk                      ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack_warten|clk                       ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack|clk                              ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.anfangszustand|clk                   ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.bit_n|clk                            ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ende|clk                             ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.error|clk                            ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.startbedingung|clk                   ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.stop_warten|clk                      ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.stopbedingung|clk                    ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.taktende|clk                         ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_2|altpll_component|_clk1~clkctrl|inclk[0]           ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_2|altpll_component|_clk1~clkctrl|outclk             ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[0]|clk                               ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[1]|clk                               ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[2]|clk                               ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[3]|clk                               ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[0]|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[1]|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[2]|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[3]|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SCLK|clk                                        ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SDIN~en|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SDIN~reg0|clk                                   ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Sektion[0]|clk                                  ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Sektion[1]|clk                                  ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack_warten2|clk                      ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack_warten|clk                       ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack|clk                              ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.anfangszustand|clk                   ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.bit_n|clk                            ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ende|clk                             ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.error|clk                            ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.startbedingung|clk                   ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.stop_warten|clk                      ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.stopbedingung|clk                    ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.taktende|clk                         ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_2|altpll_component|_clk1~clkctrl|inclk[0]           ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_2|altpll_component|_clk1~clkctrl|outclk             ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+---------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'                                                                                                                     ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                               ; Clock Edge ; Target                                                                     ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------+
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[0]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[0]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[1]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[1]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[2]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[2]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[3]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[3]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[4]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[4]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[5]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[5]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[6]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[6]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[7]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[7]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[8]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[8]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|clk_400kHz|clk                           ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|clk_400kHz|clk                           ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_1|altpll_component|_clk1~clkctrl|inclk[0]            ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_1|altpll_component|_clk1~clkctrl|inclk[0]            ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_1|altpll_component|_clk1~clkctrl|outclk              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_1|altpll_component|_clk1~clkctrl|outclk              ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                 ;
+-------------+------------+-------+-------+------------+-----------------------------------------------------+
; Data Port   ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                     ;
+-------------+------------+-------+-------+------------+-----------------------------------------------------+
; AUD_ADCDAT  ; AUD_BCLK   ; 1.991 ; 1.991 ; Rise       ; AUD_BCLK                                            ;
; AUD_ADCLRCK ; AUD_BCLK   ; 3.019 ; 3.019 ; Rise       ; AUD_BCLK                                            ;
; AUD_DACLRCK ; AUD_BCLK   ; 2.820 ; 2.820 ; Fall       ; AUD_BCLK                                            ;
; SW[*]       ; CLOCK_27   ; 2.709 ; 2.709 ; Rise       ; CLOCK_27                                            ;
;  SW[17]     ; CLOCK_27   ; 2.709 ; 2.709 ; Rise       ; CLOCK_27                                            ;
; KEY[*]      ; CLOCK_50   ; 5.837 ; 5.837 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[0]     ; CLOCK_50   ; 5.837 ; 5.837 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[1]     ; CLOCK_50   ; 5.427 ; 5.427 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[2]     ; CLOCK_50   ; 4.881 ; 4.881 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[3]     ; CLOCK_50   ; 5.129 ; 5.129 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; 2.078 ; 2.078 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[2]      ; CLOCK_50   ; 2.078 ; 2.078 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; 2.105 ; 2.105 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[1]      ; CLOCK_50   ; 2.105 ; 2.105 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; I2C_SDAT    ; CLOCK_27   ; 4.426 ; 4.426 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-------------+------------+-------+-------+------------+-----------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                    ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; Data Port   ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                     ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; AUD_ADCDAT  ; AUD_BCLK   ; -1.807 ; -1.807 ; Rise       ; AUD_BCLK                                            ;
; AUD_ADCLRCK ; AUD_BCLK   ; -2.142 ; -2.142 ; Rise       ; AUD_BCLK                                            ;
; AUD_DACLRCK ; AUD_BCLK   ; -1.945 ; -1.945 ; Fall       ; AUD_BCLK                                            ;
; SW[*]       ; CLOCK_27   ; -2.420 ; -2.420 ; Rise       ; CLOCK_27                                            ;
;  SW[17]     ; CLOCK_27   ; -2.420 ; -2.420 ; Rise       ; CLOCK_27                                            ;
; KEY[*]      ; CLOCK_50   ; -3.843 ; -3.843 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[0]     ; CLOCK_50   ; -3.843 ; -3.843 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[1]     ; CLOCK_50   ; -4.991 ; -4.991 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[2]     ; CLOCK_50   ; -4.080 ; -4.080 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[3]     ; CLOCK_50   ; -4.466 ; -4.466 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; -1.612 ; -1.612 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[2]      ; CLOCK_50   ; -1.612 ; -1.612 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; -1.219 ; -1.219 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[1]      ; CLOCK_50   ; -1.219 ; -1.219 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; I2C_SDAT    ; CLOCK_27   ; -3.865 ; -3.865 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                        ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                     ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; AUD_DACDAT   ; AUD_BCLK   ; 4.121 ; 4.121 ; Fall       ; AUD_BCLK                                            ;
; LCD_DATA[*]  ; CLOCK_50   ; 2.622 ; 2.622 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[0] ; CLOCK_50   ; 2.357 ; 2.357 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[1] ; CLOCK_50   ; 2.450 ; 2.450 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[2] ; CLOCK_50   ; 2.564 ; 2.564 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[3] ; CLOCK_50   ; 2.492 ; 2.492 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[4] ; CLOCK_50   ; 2.385 ; 2.385 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[5] ; CLOCK_50   ; 2.554 ; 2.554 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[6] ; CLOCK_50   ; 2.608 ; 2.608 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[7] ; CLOCK_50   ; 2.622 ; 2.622 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_EN       ; CLOCK_50   ; 2.451 ; 2.451 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_RS       ; CLOCK_50   ; 2.502 ; 2.502 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX0[*]      ; CLOCK_50   ; 3.166 ; 3.166 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[2]     ; CLOCK_50   ; 2.992 ; 2.992 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[3]     ; CLOCK_50   ; 3.147 ; 3.147 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[4]     ; CLOCK_50   ; 3.166 ; 3.166 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[5]     ; CLOCK_50   ; 3.142 ; 3.142 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[6]     ; CLOCK_50   ; 3.057 ; 3.057 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX1[*]      ; CLOCK_50   ; 3.705 ; 3.705 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[1]     ; CLOCK_50   ; 3.705 ; 3.705 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[2]     ; CLOCK_50   ; 2.701 ; 2.701 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[3]     ; CLOCK_50   ; 2.985 ; 2.985 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[4]     ; CLOCK_50   ; 3.420 ; 3.420 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[6]     ; CLOCK_50   ; 2.733 ; 2.733 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX2[*]      ; CLOCK_50   ; 3.934 ; 3.934 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[0]     ; CLOCK_50   ; 3.863 ; 3.863 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[1]     ; CLOCK_50   ; 3.415 ; 3.415 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[2]     ; CLOCK_50   ; 3.934 ; 3.934 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[3]     ; CLOCK_50   ; 3.644 ; 3.644 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[4]     ; CLOCK_50   ; 2.936 ; 2.936 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[5]     ; CLOCK_50   ; 3.572 ; 3.572 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[6]     ; CLOCK_50   ; 3.222 ; 3.222 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX3[*]      ; CLOCK_50   ; 4.101 ; 4.101 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[0]     ; CLOCK_50   ; 4.101 ; 4.101 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[1]     ; CLOCK_50   ; 2.938 ; 2.938 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[2]     ; CLOCK_50   ; 3.148 ; 3.148 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[3]     ; CLOCK_50   ; 3.913 ; 3.913 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[4]     ; CLOCK_50   ; 3.098 ; 3.098 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[5]     ; CLOCK_50   ; 3.403 ; 3.403 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[6]     ; CLOCK_50   ; 2.968 ; 2.968 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX4[*]      ; CLOCK_50   ; 3.050 ; 3.050 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX4[6]     ; CLOCK_50   ; 3.050 ; 3.050 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX6[*]      ; CLOCK_50   ; 2.455 ; 2.455 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[0]     ; CLOCK_50   ; 2.455 ; 2.455 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[1]     ; CLOCK_50   ; 2.414 ; 2.414 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[2]     ; CLOCK_50   ; 2.338 ; 2.338 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[3]     ; CLOCK_50   ; 2.235 ; 2.235 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[4]     ; CLOCK_50   ; 2.425 ; 2.425 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[5]     ; CLOCK_50   ; 2.384 ; 2.384 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[6]     ; CLOCK_50   ; 2.388 ; 2.388 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX7[*]      ; CLOCK_50   ; 2.736 ; 2.736 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[0]     ; CLOCK_50   ; 2.467 ; 2.467 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[1]     ; CLOCK_50   ; 2.736 ; 2.736 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[2]     ; CLOCK_50   ; 2.706 ; 2.706 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[3]     ; CLOCK_50   ; 2.437 ; 2.437 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[4]     ; CLOCK_50   ; 2.437 ; 2.437 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[5]     ; CLOCK_50   ; 2.548 ; 2.548 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; AUD_XCK      ; CLOCK_27   ; 1.463 ;       ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SCLK     ; CLOCK_27   ; 2.545 ; 2.545 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SDAT     ; CLOCK_27   ; 2.553 ; 2.553 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; AUD_XCK      ; CLOCK_27   ;       ; 1.463 ; Fall       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                     ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; AUD_DACDAT   ; AUD_BCLK   ; 4.121 ; 4.121 ; Fall       ; AUD_BCLK                                            ;
; LCD_DATA[*]  ; CLOCK_50   ; 2.357 ; 2.357 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[0] ; CLOCK_50   ; 2.357 ; 2.357 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[1] ; CLOCK_50   ; 2.450 ; 2.450 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[2] ; CLOCK_50   ; 2.564 ; 2.564 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[3] ; CLOCK_50   ; 2.492 ; 2.492 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[4] ; CLOCK_50   ; 2.385 ; 2.385 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[5] ; CLOCK_50   ; 2.554 ; 2.554 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[6] ; CLOCK_50   ; 2.608 ; 2.608 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[7] ; CLOCK_50   ; 2.622 ; 2.622 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_EN       ; CLOCK_50   ; 2.451 ; 2.451 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_RS       ; CLOCK_50   ; 2.502 ; 2.502 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX0[*]      ; CLOCK_50   ; 2.992 ; 2.992 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[2]     ; CLOCK_50   ; 2.992 ; 2.992 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[3]     ; CLOCK_50   ; 3.147 ; 3.147 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[4]     ; CLOCK_50   ; 3.166 ; 3.166 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[5]     ; CLOCK_50   ; 3.142 ; 3.142 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[6]     ; CLOCK_50   ; 3.057 ; 3.057 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX1[*]      ; CLOCK_50   ; 2.701 ; 2.701 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[1]     ; CLOCK_50   ; 3.705 ; 3.705 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[2]     ; CLOCK_50   ; 2.701 ; 2.701 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[3]     ; CLOCK_50   ; 2.985 ; 2.985 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[4]     ; CLOCK_50   ; 3.420 ; 3.420 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[6]     ; CLOCK_50   ; 2.733 ; 2.733 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX2[*]      ; CLOCK_50   ; 2.936 ; 2.936 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[0]     ; CLOCK_50   ; 3.863 ; 3.863 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[1]     ; CLOCK_50   ; 3.415 ; 3.415 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[2]     ; CLOCK_50   ; 3.934 ; 3.934 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[3]     ; CLOCK_50   ; 3.644 ; 3.644 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[4]     ; CLOCK_50   ; 2.936 ; 2.936 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[5]     ; CLOCK_50   ; 3.572 ; 3.572 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[6]     ; CLOCK_50   ; 3.222 ; 3.222 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX3[*]      ; CLOCK_50   ; 2.938 ; 2.938 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[0]     ; CLOCK_50   ; 4.101 ; 4.101 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[1]     ; CLOCK_50   ; 2.938 ; 2.938 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[2]     ; CLOCK_50   ; 3.148 ; 3.148 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[3]     ; CLOCK_50   ; 3.913 ; 3.913 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[4]     ; CLOCK_50   ; 3.098 ; 3.098 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[5]     ; CLOCK_50   ; 3.403 ; 3.403 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[6]     ; CLOCK_50   ; 2.968 ; 2.968 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX4[*]      ; CLOCK_50   ; 3.050 ; 3.050 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX4[6]     ; CLOCK_50   ; 3.050 ; 3.050 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX6[*]      ; CLOCK_50   ; 2.235 ; 2.235 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[0]     ; CLOCK_50   ; 2.455 ; 2.455 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[1]     ; CLOCK_50   ; 2.414 ; 2.414 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[2]     ; CLOCK_50   ; 2.338 ; 2.338 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[3]     ; CLOCK_50   ; 2.235 ; 2.235 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[4]     ; CLOCK_50   ; 2.425 ; 2.425 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[5]     ; CLOCK_50   ; 2.384 ; 2.384 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[6]     ; CLOCK_50   ; 2.388 ; 2.388 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX7[*]      ; CLOCK_50   ; 2.437 ; 2.437 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[0]     ; CLOCK_50   ; 2.467 ; 2.467 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[1]     ; CLOCK_50   ; 2.736 ; 2.736 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[2]     ; CLOCK_50   ; 2.706 ; 2.706 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[3]     ; CLOCK_50   ; 2.437 ; 2.437 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[4]     ; CLOCK_50   ; 2.437 ; 2.437 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[5]     ; CLOCK_50   ; 2.548 ; 2.548 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; AUD_XCK      ; CLOCK_27   ; 1.463 ;       ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SCLK     ; CLOCK_27   ; 2.545 ; 2.545 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SDAT     ; CLOCK_27   ; 2.553 ; 2.553 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; AUD_XCK      ; CLOCK_27   ;       ; 1.463 ; Fall       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+


+----------------------------------------------------+
; Propagation Delay                                  ;
+------------+-------------+-------+----+----+-------+
; Input Port ; Output Port ; RR    ; RF ; FR ; FF    ;
+------------+-------------+-------+----+----+-------+
; SW[0]      ; AUD_DACDAT  ; 3.918 ;    ;    ; 3.918 ;
+------------+-------------+-------+----+----+-------+


+----------------------------------------------------+
; Minimum Propagation Delay                          ;
+------------+-------------+-------+----+----+-------+
; Input Port ; Output Port ; RR    ; RF ; FR ; FF    ;
+------------+-------------+-------+----+----+-------+
; SW[0]      ; AUD_DACDAT  ; 3.918 ;    ;    ; 3.918 ;
+------------+-------------+-------+----+----+-------+


+----------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                      ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+
; Data Port ; Clock Port ; Rise  ; Fall ; Clock Edge ; Clock Reference                                     ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+
; I2C_SDAT  ; CLOCK_27   ; 2.504 ;      ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                              ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+
; Data Port ; Clock Port ; Rise  ; Fall ; Clock Edge ; Clock Reference                                     ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+
; I2C_SDAT  ; CLOCK_27   ; 2.504 ;      ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                              ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+
; Data Port ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                     ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+
; I2C_SDAT  ; CLOCK_27   ; 2.504     ;           ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                      ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+
; Data Port ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                     ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+
; I2C_SDAT  ; CLOCK_27   ; 2.504     ;           ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------+
; Multicorner Timing Analysis Summary                                                                                      ;
+---------------------------------------------------------+-----------+---------+----------+---------+---------------------+
; Clock                                                   ; Setup     ; Hold    ; Recovery ; Removal ; Minimum Pulse Width ;
+---------------------------------------------------------+-----------+---------+----------+---------+---------------------+
; Worst-case Slack                                        ; -5.322    ; -2.295  ; 3.745    ; 2.948   ; -1.222              ;
;  AUD_BCLK                                               ; -2.398    ; -0.105  ; N/A      ; N/A     ; -1.222              ;
;  CLOCK_27                                               ; 32.200    ; 0.458   ; N/A      ; N/A     ; 17.518              ;
;  CLOCK_50                                               ; N/A       ; N/A     ; N/A      ; N/A     ; 10.000              ;
;  audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.951     ; -2.109  ; N/A      ; N/A     ; -0.500              ;
;  audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 2.195     ; -2.295  ; N/A      ; N/A     ; -0.500              ;
;  clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; -5.322    ; -0.158  ; N/A      ; N/A     ; 7.981               ;
;  clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 97.566    ; 0.303   ; N/A      ; N/A     ; 49.000              ;
;  clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; -2.033    ; 0.215   ; 3.745    ; 2.948   ; 40.666              ;
; Design-wide TNS                                         ; -1451.199 ; -88.952 ; 0.0      ; 0.0     ; -190.222            ;
;  AUD_BCLK                                               ; -257.223  ; -0.688  ; N/A      ; N/A     ; -142.222            ;
;  CLOCK_27                                               ; 0.000     ; 0.000   ; N/A      ; N/A     ; 0.000               ;
;  CLOCK_50                                               ; N/A       ; N/A     ; N/A      ; N/A     ; 0.000               ;
;  audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000     ; -36.646 ; N/A      ; N/A     ; -24.000             ;
;  audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000     ; -51.303 ; N/A      ; N/A     ; -24.000             ;
;  clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; -1154.566 ; -0.315  ; N/A      ; N/A     ; 0.000               ;
;  clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 0.000     ; 0.000   ; N/A      ; N/A     ; 0.000               ;
;  clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; -39.410   ; 0.000   ; 0.000    ; 0.000   ; 0.000               ;
+---------------------------------------------------------+-----------+---------+----------+---------+---------------------+


+---------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                   ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; Data Port   ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                     ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; AUD_ADCDAT  ; AUD_BCLK   ; 3.337  ; 3.337  ; Rise       ; AUD_BCLK                                            ;
; AUD_ADCLRCK ; AUD_BCLK   ; 5.501  ; 5.501  ; Rise       ; AUD_BCLK                                            ;
; AUD_DACLRCK ; AUD_BCLK   ; 4.979  ; 4.979  ; Fall       ; AUD_BCLK                                            ;
; SW[*]       ; CLOCK_27   ; 5.027  ; 5.027  ; Rise       ; CLOCK_27                                            ;
;  SW[17]     ; CLOCK_27   ; 5.027  ; 5.027  ; Rise       ; CLOCK_27                                            ;
; KEY[*]      ; CLOCK_50   ; 10.605 ; 10.605 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[0]     ; CLOCK_50   ; 10.605 ; 10.605 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[1]     ; CLOCK_50   ; 9.810  ; 9.810  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[2]     ; CLOCK_50   ; 8.552  ; 8.552  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[3]     ; CLOCK_50   ; 8.976  ; 8.976  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; 3.801  ; 3.801  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[2]      ; CLOCK_50   ; 3.801  ; 3.801  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; 3.900  ; 3.900  ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[1]      ; CLOCK_50   ; 3.900  ; 3.900  ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; I2C_SDAT    ; CLOCK_27   ; 7.847  ; 7.847  ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                    ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; Data Port   ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                     ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; AUD_ADCDAT  ; AUD_BCLK   ; -1.807 ; -1.807 ; Rise       ; AUD_BCLK                                            ;
; AUD_ADCLRCK ; AUD_BCLK   ; -2.142 ; -2.142 ; Rise       ; AUD_BCLK                                            ;
; AUD_DACLRCK ; AUD_BCLK   ; -1.945 ; -1.945 ; Fall       ; AUD_BCLK                                            ;
; SW[*]       ; CLOCK_27   ; -2.420 ; -2.420 ; Rise       ; CLOCK_27                                            ;
;  SW[17]     ; CLOCK_27   ; -2.420 ; -2.420 ; Rise       ; CLOCK_27                                            ;
; KEY[*]      ; CLOCK_50   ; -3.843 ; -3.843 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[0]     ; CLOCK_50   ; -3.843 ; -3.843 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[1]     ; CLOCK_50   ; -4.991 ; -4.991 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[2]     ; CLOCK_50   ; -4.080 ; -4.080 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[3]     ; CLOCK_50   ; -4.466 ; -4.466 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; -1.612 ; -1.612 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[2]      ; CLOCK_50   ; -1.612 ; -1.612 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; -1.219 ; -1.219 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[1]      ; CLOCK_50   ; -1.219 ; -1.219 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; I2C_SDAT    ; CLOCK_27   ; -3.865 ; -3.865 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                        ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                     ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; AUD_DACDAT   ; AUD_BCLK   ; 7.825 ; 7.825 ; Fall       ; AUD_BCLK                                            ;
; LCD_DATA[*]  ; CLOCK_50   ; 5.361 ; 5.361 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[0] ; CLOCK_50   ; 4.810 ; 4.810 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[1] ; CLOCK_50   ; 5.018 ; 5.018 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[2] ; CLOCK_50   ; 5.210 ; 5.210 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[3] ; CLOCK_50   ; 5.103 ; 5.103 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[4] ; CLOCK_50   ; 4.831 ; 4.831 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[5] ; CLOCK_50   ; 5.218 ; 5.218 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[6] ; CLOCK_50   ; 5.273 ; 5.273 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[7] ; CLOCK_50   ; 5.361 ; 5.361 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_EN       ; CLOCK_50   ; 5.031 ; 5.031 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_RS       ; CLOCK_50   ; 5.123 ; 5.123 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX0[*]      ; CLOCK_50   ; 6.319 ; 6.319 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[2]     ; CLOCK_50   ; 5.983 ; 5.983 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[3]     ; CLOCK_50   ; 6.290 ; 6.290 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[4]     ; CLOCK_50   ; 6.319 ; 6.319 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[5]     ; CLOCK_50   ; 6.287 ; 6.287 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[6]     ; CLOCK_50   ; 6.005 ; 6.005 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX1[*]      ; CLOCK_50   ; 7.416 ; 7.416 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[1]     ; CLOCK_50   ; 7.416 ; 7.416 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[2]     ; CLOCK_50   ; 5.366 ; 5.366 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[3]     ; CLOCK_50   ; 6.050 ; 6.050 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[4]     ; CLOCK_50   ; 7.037 ; 7.037 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[6]     ; CLOCK_50   ; 5.454 ; 5.454 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX2[*]      ; CLOCK_50   ; 7.827 ; 7.827 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[0]     ; CLOCK_50   ; 7.827 ; 7.827 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[1]     ; CLOCK_50   ; 7.081 ; 7.081 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[2]     ; CLOCK_50   ; 7.682 ; 7.682 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[3]     ; CLOCK_50   ; 7.489 ; 7.489 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[4]     ; CLOCK_50   ; 5.817 ; 5.817 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[5]     ; CLOCK_50   ; 7.102 ; 7.102 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[6]     ; CLOCK_50   ; 6.517 ; 6.517 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX3[*]      ; CLOCK_50   ; 8.036 ; 8.036 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[0]     ; CLOCK_50   ; 8.036 ; 8.036 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[1]     ; CLOCK_50   ; 5.824 ; 5.824 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[2]     ; CLOCK_50   ; 6.324 ; 6.324 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[3]     ; CLOCK_50   ; 7.579 ; 7.579 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[4]     ; CLOCK_50   ; 6.232 ; 6.232 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[5]     ; CLOCK_50   ; 6.815 ; 6.815 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[6]     ; CLOCK_50   ; 5.882 ; 5.882 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX4[*]      ; CLOCK_50   ; 6.050 ; 6.050 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX4[6]     ; CLOCK_50   ; 6.050 ; 6.050 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX6[*]      ; CLOCK_50   ; 4.960 ; 4.960 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[0]     ; CLOCK_50   ; 4.960 ; 4.960 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[1]     ; CLOCK_50   ; 4.850 ; 4.850 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[2]     ; CLOCK_50   ; 4.669 ; 4.669 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[3]     ; CLOCK_50   ; 4.448 ; 4.448 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[4]     ; CLOCK_50   ; 4.916 ; 4.916 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[5]     ; CLOCK_50   ; 4.815 ; 4.815 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[6]     ; CLOCK_50   ; 4.822 ; 4.822 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX7[*]      ; CLOCK_50   ; 5.434 ; 5.434 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[0]     ; CLOCK_50   ; 4.978 ; 4.978 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[1]     ; CLOCK_50   ; 5.434 ; 5.434 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[2]     ; CLOCK_50   ; 5.404 ; 5.404 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[3]     ; CLOCK_50   ; 4.948 ; 4.948 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[4]     ; CLOCK_50   ; 4.948 ; 4.948 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[5]     ; CLOCK_50   ; 5.101 ; 5.101 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; AUD_XCK      ; CLOCK_27   ; 2.917 ;       ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SCLK     ; CLOCK_27   ; 5.063 ; 5.063 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SDAT     ; CLOCK_27   ; 5.075 ; 5.075 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; AUD_XCK      ; CLOCK_27   ;       ; 2.917 ; Fall       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                     ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; AUD_DACDAT   ; AUD_BCLK   ; 4.121 ; 4.121 ; Fall       ; AUD_BCLK                                            ;
; LCD_DATA[*]  ; CLOCK_50   ; 2.357 ; 2.357 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[0] ; CLOCK_50   ; 2.357 ; 2.357 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[1] ; CLOCK_50   ; 2.450 ; 2.450 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[2] ; CLOCK_50   ; 2.564 ; 2.564 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[3] ; CLOCK_50   ; 2.492 ; 2.492 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[4] ; CLOCK_50   ; 2.385 ; 2.385 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[5] ; CLOCK_50   ; 2.554 ; 2.554 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[6] ; CLOCK_50   ; 2.608 ; 2.608 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[7] ; CLOCK_50   ; 2.622 ; 2.622 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_EN       ; CLOCK_50   ; 2.451 ; 2.451 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_RS       ; CLOCK_50   ; 2.502 ; 2.502 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX0[*]      ; CLOCK_50   ; 2.992 ; 2.992 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[2]     ; CLOCK_50   ; 2.992 ; 2.992 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[3]     ; CLOCK_50   ; 3.147 ; 3.147 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[4]     ; CLOCK_50   ; 3.166 ; 3.166 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[5]     ; CLOCK_50   ; 3.142 ; 3.142 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[6]     ; CLOCK_50   ; 3.057 ; 3.057 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX1[*]      ; CLOCK_50   ; 2.701 ; 2.701 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[1]     ; CLOCK_50   ; 3.705 ; 3.705 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[2]     ; CLOCK_50   ; 2.701 ; 2.701 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[3]     ; CLOCK_50   ; 2.985 ; 2.985 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[4]     ; CLOCK_50   ; 3.420 ; 3.420 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[6]     ; CLOCK_50   ; 2.733 ; 2.733 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX2[*]      ; CLOCK_50   ; 2.936 ; 2.936 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[0]     ; CLOCK_50   ; 3.863 ; 3.863 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[1]     ; CLOCK_50   ; 3.415 ; 3.415 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[2]     ; CLOCK_50   ; 3.934 ; 3.934 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[3]     ; CLOCK_50   ; 3.644 ; 3.644 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[4]     ; CLOCK_50   ; 2.936 ; 2.936 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[5]     ; CLOCK_50   ; 3.572 ; 3.572 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[6]     ; CLOCK_50   ; 3.222 ; 3.222 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX3[*]      ; CLOCK_50   ; 2.938 ; 2.938 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[0]     ; CLOCK_50   ; 4.101 ; 4.101 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[1]     ; CLOCK_50   ; 2.938 ; 2.938 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[2]     ; CLOCK_50   ; 3.148 ; 3.148 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[3]     ; CLOCK_50   ; 3.913 ; 3.913 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[4]     ; CLOCK_50   ; 3.098 ; 3.098 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[5]     ; CLOCK_50   ; 3.403 ; 3.403 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[6]     ; CLOCK_50   ; 2.968 ; 2.968 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX4[*]      ; CLOCK_50   ; 3.050 ; 3.050 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX4[6]     ; CLOCK_50   ; 3.050 ; 3.050 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX6[*]      ; CLOCK_50   ; 2.235 ; 2.235 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[0]     ; CLOCK_50   ; 2.455 ; 2.455 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[1]     ; CLOCK_50   ; 2.414 ; 2.414 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[2]     ; CLOCK_50   ; 2.338 ; 2.338 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[3]     ; CLOCK_50   ; 2.235 ; 2.235 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[4]     ; CLOCK_50   ; 2.425 ; 2.425 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[5]     ; CLOCK_50   ; 2.384 ; 2.384 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[6]     ; CLOCK_50   ; 2.388 ; 2.388 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX7[*]      ; CLOCK_50   ; 2.437 ; 2.437 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[0]     ; CLOCK_50   ; 2.467 ; 2.467 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[1]     ; CLOCK_50   ; 2.736 ; 2.736 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[2]     ; CLOCK_50   ; 2.706 ; 2.706 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[3]     ; CLOCK_50   ; 2.437 ; 2.437 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[4]     ; CLOCK_50   ; 2.437 ; 2.437 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[5]     ; CLOCK_50   ; 2.548 ; 2.548 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; AUD_XCK      ; CLOCK_27   ; 1.463 ;       ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SCLK     ; CLOCK_27   ; 2.545 ; 2.545 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SDAT     ; CLOCK_27   ; 2.553 ; 2.553 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; AUD_XCK      ; CLOCK_27   ;       ; 1.463 ; Fall       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+


+----------------------------------------------------+
; Progagation Delay                                  ;
+------------+-------------+-------+----+----+-------+
; Input Port ; Output Port ; RR    ; RF ; FR ; FF    ;
+------------+-------------+-------+----+----+-------+
; SW[0]      ; AUD_DACDAT  ; 7.421 ;    ;    ; 7.421 ;
+------------+-------------+-------+----+----+-------+


+----------------------------------------------------+
; Minimum Progagation Delay                          ;
+------------+-------------+-------+----+----+-------+
; Input Port ; Output Port ; RR    ; RF ; FR ; FF    ;
+------------+-------------+-------+----+----+-------+
; SW[0]      ; AUD_DACDAT  ; 3.918 ;    ;    ; 3.918 ;
+------------+-------------+-------+----+----+-------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Transfers                                                                                                                                                 ;
+--------------------------------------------------------+--------------------------------------------------------+--------------+----------+----------+----------+
; From Clock                                             ; To Clock                                               ; RR Paths     ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------+--------------------------------------------------------+--------------+----------+----------+----------+
; AUD_BCLK                                               ; AUD_BCLK                                               ; 1101         ; 0        ; 0        ; 475      ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK                                               ; 0            ; 0        ; 24       ; 0        ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK                                               ; 0            ; 0        ; 24       ; 0        ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 24           ; 0        ; 0        ; 0        ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 24           ; 0        ; 0        ; 0        ;
; CLOCK_27                                               ; CLOCK_27                                               ; 1053         ; 0        ; 0        ; 0        ;
; AUD_BCLK                                               ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 72           ; 0        ; 0        ; 0        ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 1            ; 1        ; 0        ; 0        ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 1            ; 1        ; 0        ; 0        ;
; CLOCK_27                                               ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 350          ; 0        ; 0        ; 0        ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; > 2147483647 ; 26       ; 38706    ; 953      ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 63           ; 0        ; 0        ; 0        ;
; CLOCK_27                                               ; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 6            ; 0        ; 0        ; 0        ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 24           ; 0        ; 0        ; 0        ;
; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 233          ; 0        ; 0        ; 0        ;
+--------------------------------------------------------+--------------------------------------------------------+--------------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Transfers                                                                                                                                                  ;
+--------------------------------------------------------+--------------------------------------------------------+--------------+----------+----------+----------+
; From Clock                                             ; To Clock                                               ; RR Paths     ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------+--------------------------------------------------------+--------------+----------+----------+----------+
; AUD_BCLK                                               ; AUD_BCLK                                               ; 1101         ; 0        ; 0        ; 475      ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK                                               ; 0            ; 0        ; 24       ; 0        ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK                                               ; 0            ; 0        ; 24       ; 0        ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 24           ; 0        ; 0        ; 0        ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 24           ; 0        ; 0        ; 0        ;
; CLOCK_27                                               ; CLOCK_27                                               ; 1053         ; 0        ; 0        ; 0        ;
; AUD_BCLK                                               ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 72           ; 0        ; 0        ; 0        ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 1            ; 1        ; 0        ; 0        ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 1            ; 1        ; 0        ; 0        ;
; CLOCK_27                                               ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 350          ; 0        ; 0        ; 0        ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; > 2147483647 ; 26       ; 38706    ; 953      ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 63           ; 0        ; 0        ; 0        ;
; CLOCK_27                                               ; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 6            ; 0        ; 0        ; 0        ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 24           ; 0        ; 0        ; 0        ;
; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 233          ; 0        ; 0        ; 0        ;
+--------------------------------------------------------+--------------------------------------------------------+--------------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+--------------------------------------------------------------------------------------------------------------+
; Recovery Transfers                                                                                           ;
+------------+-----------------------------------------------------+----------+----------+----------+----------+
; From Clock ; To Clock                                            ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+------------+-----------------------------------------------------+----------+----------+----------+----------+
; CLOCK_27   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 18       ; 0        ; 0        ; 0        ;
+------------+-----------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+--------------------------------------------------------------------------------------------------------------+
; Removal Transfers                                                                                            ;
+------------+-----------------------------------------------------+----------+----------+----------+----------+
; From Clock ; To Clock                                            ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+------------+-----------------------------------------------------+----------+----------+----------+----------+
; CLOCK_27   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 18       ; 0        ; 0        ; 0        ;
+------------+-----------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


---------------
; Report TCCS ;
---------------
No dedicated SERDES Transmitter circuitry present in device or used in design


---------------
; Report RSKM ;
---------------
No dedicated SERDES Receiver circuitry present in device or used in design


+------------------------------------------------+
; Unconstrained Paths                            ;
+---------------------------------+-------+------+
; Property                        ; Setup ; Hold ;
+---------------------------------+-------+------+
; Illegal Clocks                  ; 0     ; 0    ;
; Unconstrained Clocks            ; 0     ; 0    ;
; Unconstrained Input Ports       ; 12    ; 12   ;
; Unconstrained Input Port Paths  ; 487   ; 487  ;
; Unconstrained Output Ports      ; 52    ; 52   ;
; Unconstrained Output Port Paths ; 54    ; 54   ;
+---------------------------------+-------+------+


+------------------------------------+
; TimeQuest Timing Analyzer Messages ;
+------------------------------------+
Info: *******************************************************************
Info: Running Quartus II 64-Bit TimeQuest Timing Analyzer
    Info: Version 11.1 Build 173 11/01/2011 SJ Full Version
    Info: Processing started: Fri Jun 15 22:31:44 2012
Info: Command: quartus_sta Equalizer -c Equalizer
Info: qsta_default_script.tcl version: #1
Warning (20028): Parallel compilation is not licensed and has been disabled
Critical Warning (332012): Synopsys Design Constraints File file not found: 'Equalizer.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design.
Info (332142): No user constrained generated clocks found in the design. Calling "derive_pll_clocks -create_base_clocks"
Info (332110): Deriving PLL Clocks
    Info (332110): create_clock -period 37.037 -waveform {0.000 18.518} -name CLOCK_27 CLOCK_27
    Info (332110): create_clock -period 20.000 -waveform {0.000 10.000} -name CLOCK_50 CLOCK_50
    Info (332110): create_generated_clock -source {clock_generator_1|pll_1|altpll_component|pll|inclk[0]} -duty_cycle 50.00 -name {clock_generator_1|pll_1|altpll_component|pll|clk[0]} {clock_generator_1|pll_1|altpll_component|pll|clk[0]}
    Info (332110): create_generated_clock -source {clock_generator_1|pll_1|altpll_component|pll|inclk[0]} -divide_by 5 -duty_cycle 50.00 -name {clock_generator_1|pll_1|altpll_component|pll|clk[1]} {clock_generator_1|pll_1|altpll_component|pll|clk[1]}
    Info (332110): create_generated_clock -source {clock_generator_1|pll_2|altpll_component|pll|inclk[0]} -divide_by 9 -multiply_by 4 -duty_cycle 50.00 -name {clock_generator_1|pll_2|altpll_component|pll|clk[1]} {clock_generator_1|pll_2|altpll_component|pll|clk[1]}
Info (332142): No user constrained base clocks found in the design. Calling "derive_clocks -period 1.0"
Info (332105): Deriving Clocks
    Info (332105): create_clock -period 1.000 -name AUD_BCLK AUD_BCLK
    Info (332105): create_clock -period 1.000 -name audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr
    Info (332105): create_clock -period 1.000 -name audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql
Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON
Info: Analyzing Slow Model
Warning (332009): The launch and latch times for the relationship between source clock: clock_generator_1|pll_1|altpll_component|pll|clk[1] and destination clock: clock_generator_1|pll_2|altpll_component|pll|clk[1] are outside of the legal time range. The relationship difference is correct, however the launch time is set to 0.
Critical Warning (332148): Timing requirements not met
Info (332146): Worst-case setup slack is -5.322
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -5.322     -1154.566 clock_generator_1|pll_1|altpll_component|pll|clk[0] 
    Info (332119):    -2.398      -257.223 AUD_BCLK 
    Info (332119):    -2.033       -39.410 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
    Info (332119):     2.131         0.000 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql 
    Info (332119):     2.660         0.000 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr 
    Info (332119):    32.200         0.000 CLOCK_27 
    Info (332119):    97.566         0.000 clock_generator_1|pll_1|altpll_component|pll|clk[1] 
Info (332146): Worst-case hold slack is -2.295
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -2.295       -51.303 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr 
    Info (332119):    -2.109       -36.646 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql 
    Info (332119):    -0.158        -0.315 clock_generator_1|pll_1|altpll_component|pll|clk[0] 
    Info (332119):    -0.105        -0.688 AUD_BCLK 
    Info (332119):     0.391         0.000 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
    Info (332119):     0.675         0.000 clock_generator_1|pll_1|altpll_component|pll|clk[1] 
    Info (332119):     1.059         0.000 CLOCK_27 
Info (332146): Worst-case recovery slack is 3.745
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     3.745         0.000 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
Info (332146): Worst-case removal slack is 5.033
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     5.033         0.000 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
Info (332146): Worst-case minimum pulse width slack is -1.222
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -1.222      -142.222 AUD_BCLK 
    Info (332119):    -0.500       -24.000 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql 
    Info (332119):    -0.500       -24.000 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr 
    Info (332119):     8.077         0.000 clock_generator_1|pll_1|altpll_component|pll|clk[0] 
    Info (332119):    10.000         0.000 CLOCK_50 
    Info (332119):    17.518         0.000 CLOCK_27 
    Info (332119):    40.666         0.000 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
    Info (332119):    49.000         0.000 clock_generator_1|pll_1|altpll_component|pll|clk[1] 
Info (332001): The selected device family is not supported by the report_metastability command.
Info: Analyzing Fast Model
Info (306004): Started post-fitting delay annotation
Warning (306006): Found 73 output pins without output pin load capacitance assignment
    Info (306007): Pin "LCD_DATA[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "LCD_DATA[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "LCD_DATA[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "LCD_DATA[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "LCD_DATA[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "LCD_DATA[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "LCD_DATA[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "LCD_DATA[7]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "I2C_SDAT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "LCD_EN" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "LCD_RW" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "LCD_RS" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "LCD_ON" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "LCD_BLON" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX0[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX0[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX0[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX0[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX0[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX0[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX0[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX1[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX1[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX1[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX1[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX1[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX1[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX1[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX2[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX2[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX2[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX2[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX2[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX2[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX2[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX3[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX3[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX3[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX3[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX3[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX3[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX3[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX4[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX4[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX4[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX4[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX4[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX4[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX4[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX5[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX5[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX5[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX5[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX5[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX5[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX5[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX6[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX6[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX6[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX6[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX6[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX6[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX6[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX7[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX7[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX7[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX7[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX7[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX7[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "HEX7[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "I2C_SCLK" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "AUD_DACDAT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info (306007): Pin "AUD_XCK" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
Info (306005): Delay annotation completed successfully
Warning (332009): The launch and latch times for the relationship between source clock: clock_generator_1|pll_1|altpll_component|pll|clk[1] and destination clock: clock_generator_1|pll_2|altpll_component|pll|clk[1] are outside of the legal time range. The relationship difference is correct, however the launch time is set to 0.
Critical Warning (332148): Timing requirements not met
Info (332146): Worst-case setup slack is -3.025
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -3.025      -628.877 clock_generator_1|pll_1|altpll_component|pll|clk[0] 
    Info (332119):    -1.011       -19.988 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
    Info (332119):    -0.491       -46.337 AUD_BCLK 
    Info (332119):     1.951         0.000 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql 
    Info (332119):     2.195         0.000 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr 
    Info (332119):    34.784         0.000 CLOCK_27 
    Info (332119):    98.899         0.000 clock_generator_1|pll_1|altpll_component|pll|clk[1] 
Info (332146): Worst-case hold slack is -1.512
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -1.512       -34.600 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr 
    Info (332119):    -1.421       -27.973 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql 
    Info (332119):    -0.061        -0.394 AUD_BCLK 
    Info (332119):     0.022         0.000 clock_generator_1|pll_1|altpll_component|pll|clk[0] 
    Info (332119):     0.215         0.000 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
    Info (332119):     0.303         0.000 clock_generator_1|pll_1|altpll_component|pll|clk[1] 
    Info (332119):     0.458         0.000 CLOCK_27 
Info (332146): Worst-case recovery slack is 6.072
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     6.072         0.000 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
Info (332146): Worst-case removal slack is 2.948
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     2.948         0.000 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
Info (332146): Worst-case minimum pulse width slack is -1.222
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -1.222      -142.222 AUD_BCLK 
    Info (332119):    -0.500       -24.000 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql 
    Info (332119):    -0.500       -24.000 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr 
    Info (332119):     7.981         0.000 clock_generator_1|pll_1|altpll_component|pll|clk[0] 
    Info (332119):    10.000         0.000 CLOCK_50 
    Info (332119):    17.518         0.000 CLOCK_27 
    Info (332119):    40.666         0.000 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
    Info (332119):    49.000         0.000 clock_generator_1|pll_1|altpll_component|pll|clk[1] 
Info (332001): The selected device family is not supported by the report_metastability command.
Warning (332009): The launch and latch times for the relationship between source clock: clock_generator_1|pll_1|altpll_component|pll|clk[1] and destination clock: clock_generator_1|pll_2|altpll_component|pll|clk[1] are outside of the legal time range. The relationship difference is correct, however the launch time is set to 0.
Info (332102): Design is not fully constrained for setup requirements
Info (332102): Design is not fully constrained for hold requirements
Info: Quartus II 64-Bit TimeQuest Timing Analyzer was successful. 0 errors, 8 warnings
    Info: Peak virtual memory: 519 megabytes
    Info: Processing ended: Fri Jun 15 22:32:01 2012
    Info: Elapsed time: 00:00:17
    Info: Total CPU time (on all processors): 00:00:14


