TimeQuest Timing Analyzer report for Equalizer
Wed Jul 11 18:17:02 2012
Quartus II 64-Bit Version 11.1 Build 173 11/01/2011 SJ Full Version


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. TimeQuest Timing Analyzer Summary
  3. Parallel Compilation
  4. Clocks
  5. Slow Model Fmax Summary
  6. Slow Model Setup Summary
  7. Slow Model Hold Summary
  8. Slow Model Recovery Summary
  9. Slow Model Removal Summary
 10. Slow Model Minimum Pulse Width Summary
 11. Slow Model Setup: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'
 12. Slow Model Setup: 'AUD_BCLK'
 13. Slow Model Setup: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 14. Slow Model Setup: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'
 15. Slow Model Setup: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'
 16. Slow Model Setup: 'CLOCK_27'
 17. Slow Model Setup: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'
 18. Slow Model Hold: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'
 19. Slow Model Hold: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'
 20. Slow Model Hold: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'
 21. Slow Model Hold: 'AUD_BCLK'
 22. Slow Model Hold: 'CLOCK_27'
 23. Slow Model Hold: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'
 24. Slow Model Hold: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 25. Slow Model Recovery: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 26. Slow Model Removal: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 27. Slow Model Minimum Pulse Width: 'AUD_BCLK'
 28. Slow Model Minimum Pulse Width: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'
 29. Slow Model Minimum Pulse Width: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'
 30. Slow Model Minimum Pulse Width: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'
 31. Slow Model Minimum Pulse Width: 'CLOCK_50'
 32. Slow Model Minimum Pulse Width: 'CLOCK_27'
 33. Slow Model Minimum Pulse Width: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 34. Slow Model Minimum Pulse Width: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'
 35. Setup Times
 36. Hold Times
 37. Clock to Output Times
 38. Minimum Clock to Output Times
 39. Propagation Delay
 40. Minimum Propagation Delay
 41. Output Enable Times
 42. Minimum Output Enable Times
 43. Output Disable Times
 44. Minimum Output Disable Times
 45. Fast Model Setup Summary
 46. Fast Model Hold Summary
 47. Fast Model Recovery Summary
 48. Fast Model Removal Summary
 49. Fast Model Minimum Pulse Width Summary
 50. Fast Model Setup: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'
 51. Fast Model Setup: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 52. Fast Model Setup: 'AUD_BCLK'
 53. Fast Model Setup: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'
 54. Fast Model Setup: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'
 55. Fast Model Setup: 'CLOCK_27'
 56. Fast Model Setup: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'
 57. Fast Model Hold: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'
 58. Fast Model Hold: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'
 59. Fast Model Hold: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'
 60. Fast Model Hold: 'AUD_BCLK'
 61. Fast Model Hold: 'CLOCK_27'
 62. Fast Model Hold: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'
 63. Fast Model Hold: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 64. Fast Model Recovery: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 65. Fast Model Removal: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 66. Fast Model Minimum Pulse Width: 'AUD_BCLK'
 67. Fast Model Minimum Pulse Width: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'
 68. Fast Model Minimum Pulse Width: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'
 69. Fast Model Minimum Pulse Width: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'
 70. Fast Model Minimum Pulse Width: 'CLOCK_50'
 71. Fast Model Minimum Pulse Width: 'CLOCK_27'
 72. Fast Model Minimum Pulse Width: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'
 73. Fast Model Minimum Pulse Width: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'
 74. Setup Times
 75. Hold Times
 76. Clock to Output Times
 77. Minimum Clock to Output Times
 78. Propagation Delay
 79. Minimum Propagation Delay
 80. Output Enable Times
 81. Minimum Output Enable Times
 82. Output Disable Times
 83. Minimum Output Disable Times
 84. Multicorner Timing Analysis Summary
 85. Setup Times
 86. Hold Times
 87. Clock to Output Times
 88. Minimum Clock to Output Times
 89. Progagation Delay
 90. Minimum Progagation Delay
 91. Setup Transfers
 92. Hold Transfers
 93. Recovery Transfers
 94. Removal Transfers
 95. Report TCCS
 96. Report RSKM
 97. Unconstrained Paths
 98. TimeQuest Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2011 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+------------------------------------------------------------------------+
; TimeQuest Timing Analyzer Summary                                      ;
+--------------------+---------------------------------------------------+
; Quartus II Version ; Version 11.1 Build 173 11/01/2011 SJ Full Version ;
; Revision Name      ; Equalizer                                         ;
; Device Family      ; Cyclone II                                        ;
; Device Name        ; EP2C35F672C6                                      ;
; Timing Models      ; Final                                             ;
; Delay Model        ; Combined                                          ;
; Rise/Fall Delays   ; Unavailable                                       ;
+--------------------+---------------------------------------------------+


Parallel compilation was disabled, but you have multiple processors available. Enable parallel compilation to reduce compilation time.
+-------------------------------------+
; Parallel Compilation                ;
+----------------------------+--------+
; Processors                 ; Number ;
+----------------------------+--------+
; Number detected on machine ; 2      ;
; Maximum allowed            ; 1      ;
+----------------------------+--------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clocks                                                                                                                                                                                                                                                                                                                                 ;
+--------------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+----------+-------------------------------------------------------+------------------------------------------------------------+
; Clock Name                                             ; Type      ; Period  ; Frequency  ; Rise  ; Fall   ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master   ; Source                                                ; Targets                                                    ;
+--------------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+----------+-------------------------------------------------------+------------------------------------------------------------+
; AUD_BCLK                                               ; Base      ; 1.000   ; 1000.0 MHz ; 0.000 ; 0.500  ;            ;           ;             ;       ;        ;           ;            ;          ;          ;                                                       ; { AUD_BCLK }                                               ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Base      ; 1.000   ; 1000.0 MHz ; 0.000 ; 0.500  ;            ;           ;             ;       ;        ;           ;            ;          ;          ;                                                       ; { audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql } ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Base      ; 1.000   ; 1000.0 MHz ; 0.000 ; 0.500  ;            ;           ;             ;       ;        ;           ;            ;          ;          ;                                                       ; { audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr } ;
; CLOCK_27                                               ; Base      ; 37.037  ; 27.0 MHz   ; 0.000 ; 18.518 ;            ;           ;             ;       ;        ;           ;            ;          ;          ;                                                       ; { CLOCK_27 }                                               ;
; CLOCK_50                                               ; Base      ; 20.000  ; 50.0 MHz   ; 0.000 ; 10.000 ;            ;           ;             ;       ;        ;           ;            ;          ;          ;                                                       ; { CLOCK_50 }                                               ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; Generated ; 20.000  ; 50.0 MHz   ; 0.000 ; 10.000 ; 50.00      ; 1         ; 1           ;       ;        ;           ;            ; false    ; CLOCK_50 ; clock_generator_1|pll_1|altpll_component|pll|inclk[0] ; { clock_generator_1|pll_1|altpll_component|pll|clk[0] }    ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; Generated ; 100.000 ; 10.0 MHz   ; 0.000 ; 50.000 ; 50.00      ; 5         ; 1           ;       ;        ;           ;            ; false    ; CLOCK_50 ; clock_generator_1|pll_1|altpll_component|pll|inclk[0] ; { clock_generator_1|pll_1|altpll_component|pll|clk[1] }    ;
; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; Generated ; 83.333  ; 12.0 MHz   ; 0.000 ; 41.666 ; 50.00      ; 9         ; 4           ;       ;        ;           ;            ; false    ; CLOCK_27 ; clock_generator_1|pll_2|altpll_component|pll|inclk[0] ; { clock_generator_1|pll_2|altpll_component|pll|clk[1] }    ;
+--------------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+----------+-------------------------------------------------------+------------------------------------------------------------+


+-------------------------------------------------------------------------------------------+
; Slow Model Fmax Summary                                                                   ;
+------------+-----------------+-----------------------------------------------------+------+
; Fmax       ; Restricted Fmax ; Clock Name                                          ; Note ;
+------------+-----------------+-----------------------------------------------------+------+
; 49.08 MHz  ; 49.08 MHz       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;      ;
; 136.76 MHz ; 136.76 MHz      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;      ;
; 234.74 MHz ; 234.74 MHz      ; CLOCK_27                                            ;      ;
; 307.5 MHz  ; 307.5 MHz       ; AUD_BCLK                                            ;      ;
; 380.81 MHz ; 380.81 MHz      ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ;      ;
+------------+-----------------+-----------------------------------------------------+------+
This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods.  FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock.  Paths of different clocks, including generated clocks, are ignored.  For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis.


+---------------------------------------------------------------------------------+
; Slow Model Setup Summary                                                        ;
+--------------------------------------------------------+--------+---------------+
; Clock                                                  ; Slack  ; End Point TNS ;
+--------------------------------------------------------+--------+---------------+
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; -5.751 ; -1184.272     ;
; AUD_BCLK                                               ; -2.252 ; -263.272      ;
; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; -2.085 ; -43.247       ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.991  ; 0.000         ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.365  ; 0.000         ;
; CLOCK_27                                               ; 32.777 ; 0.000         ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 97.374 ; 0.000         ;
+--------------------------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------+
; Slow Model Hold Summary                                                         ;
+--------------------------------------------------------+--------+---------------+
; Clock                                                  ; Slack  ; End Point TNS ;
+--------------------------------------------------------+--------+---------------+
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; -1.332 ; -17.910       ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; -1.173 ; -21.550       ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; -0.173 ; -0.328        ;
; AUD_BCLK                                               ; 0.316  ; 0.000         ;
; CLOCK_27                                               ; 0.391  ; 0.000         ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 0.391  ; 0.000         ;
; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 0.391  ; 0.000         ;
+--------------------------------------------------------+--------+---------------+


+-----------------------------------------------------------------------------+
; Slow Model Recovery Summary                                                 ;
+-----------------------------------------------------+-------+---------------+
; Clock                                               ; Slack ; End Point TNS ;
+-----------------------------------------------------+-------+---------------+
; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 2.749 ; 0.000         ;
+-----------------------------------------------------+-------+---------------+


+-----------------------------------------------------------------------------+
; Slow Model Removal Summary                                                  ;
+-----------------------------------------------------+-------+---------------+
; Clock                                               ; Slack ; End Point TNS ;
+-----------------------------------------------------+-------+---------------+
; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 6.040 ; 0.000         ;
+-----------------------------------------------------+-------+---------------+


+---------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width Summary                                          ;
+--------------------------------------------------------+--------+---------------+
; Clock                                                  ; Slack  ; End Point TNS ;
+--------------------------------------------------------+--------+---------------+
; AUD_BCLK                                               ; -1.222 ; -142.222      ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; -0.500 ; -24.000       ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; -0.500 ; -24.000       ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 8.077  ; 0.000         ;
; CLOCK_50                                               ; 10.000 ; 0.000         ;
; CLOCK_27                                               ; 17.518 ; 0.000         ;
; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 40.666 ; 0.000         ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 49.000 ; 0.000         ;
+--------------------------------------------------------+--------+---------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Setup: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'                                                                                                                                                    ;
+--------+-----------------------------------------+-----------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                               ; To Node                                                   ; Launch Clock ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------+-----------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; -5.751 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[21] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.355     ; 3.433      ;
; -5.751 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[22] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.355     ; 3.433      ;
; -5.751 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[20] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.355     ; 3.433      ;
; -5.751 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[27] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.355     ; 3.433      ;
; -5.751 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[14] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.355     ; 3.433      ;
; -5.751 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[15] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.355     ; 3.433      ;
; -5.751 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[19] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.355     ; 3.433      ;
; -5.751 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[18] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.355     ; 3.433      ;
; -5.751 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[16] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.355     ; 3.433      ;
; -5.751 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[17] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.355     ; 3.433      ;
; -5.751 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[26] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.355     ; 3.433      ;
; -5.751 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[25] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.355     ; 3.433      ;
; -5.751 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[24] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.355     ; 3.433      ;
; -5.751 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[23] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.355     ; 3.433      ;
; -5.742 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.332     ; 3.447      ;
; -5.742 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[4]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.332     ; 3.447      ;
; -5.739 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.333     ; 3.443      ;
; -5.739 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[7]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.333     ; 3.443      ;
; -5.739 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[3]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.333     ; 3.443      ;
; -5.585 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[0]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.332     ; 3.290      ;
; -5.585 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.332     ; 3.290      ;
; -5.585 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[5]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.332     ; 3.290      ;
; -5.565 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f5_db[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.330     ; 3.272      ;
; -5.555 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[3]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.331     ; 3.261      ;
; -5.551 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f3_db[1]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.349     ; 3.239      ;
; -5.536 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f6_db[2]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.331     ; 3.242      ;
; -5.535 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.331     ; 3.241      ;
; -5.534 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.331     ; 3.240      ;
; -5.520 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f3_db[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.342     ; 3.215      ;
; -5.500 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f9_db[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.352     ; 3.185      ;
; -5.496 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.332     ; 3.201      ;
; -5.496 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[3]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.332     ; 3.201      ;
; -5.475 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f12_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.348     ; 3.164      ;
; -5.467 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[12] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.347     ; 3.157      ;
; -5.467 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[11] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.347     ; 3.157      ;
; -5.467 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[10] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.347     ; 3.157      ;
; -5.467 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[9]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.347     ; 3.157      ;
; -5.467 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[4]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.347     ; 3.157      ;
; -5.467 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[13] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.347     ; 3.157      ;
; -5.467 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[1]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.347     ; 3.157      ;
; -5.467 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[3]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.347     ; 3.157      ;
; -5.467 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[2]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.347     ; 3.157      ;
; -5.467 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[0]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.347     ; 3.157      ;
; -5.467 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[8]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.347     ; 3.157      ;
; -5.467 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[5]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.347     ; 3.157      ;
; -5.467 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[6]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.347     ; 3.157      ;
; -5.467 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[7]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.347     ; 3.157      ;
; -5.425 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.346     ; 3.116      ;
; -5.416 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[4]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.331     ; 3.122      ;
; -5.415 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.331     ; 3.121      ;
; -5.388 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[0]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.356     ; 3.069      ;
; -5.386 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f6_db[7]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.336     ; 3.087      ;
; -5.383 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[2]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.360     ; 3.060      ;
; -5.381 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f6_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.336     ; 3.082      ;
; -5.377 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f6_db[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.336     ; 3.078      ;
; -5.376 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f12_db[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.336     ; 3.077      ;
; -5.376 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f3_db[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.349     ; 3.064      ;
; -5.375 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.333     ; 3.079      ;
; -5.351 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.362     ; 3.026      ;
; -5.349 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.362     ; 3.024      ;
; -5.344 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.342     ; 3.039      ;
; -5.342 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f1_db[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.342     ; 3.037      ;
; -5.338 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f9_db[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.357     ; 3.018      ;
; -5.337 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[0]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.334     ; 3.040      ;
; -5.336 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[1]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.334     ; 3.039      ;
; -5.335 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[2]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.334     ; 3.038      ;
; -5.334 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f9_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.357     ; 3.014      ;
; -5.333 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.334     ; 3.036      ;
; -5.331 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f7_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.332     ; 3.036      ;
; -5.327 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f1_db[4]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.336     ; 3.028      ;
; -5.326 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 3.028      ;
; -5.322 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.341     ; 3.018      ;
; -5.321 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.341     ; 3.017      ;
; -5.319 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[4]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 3.021      ;
; -5.318 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[7]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.335     ; 3.020      ;
; -5.315 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[3]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.341     ; 3.011      ;
; -5.313 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f3_db[7]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.348     ; 3.002      ;
; -5.311 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f3_db[4]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.348     ; 3.000      ;
; -5.310 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f3_db[2]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.348     ; 2.999      ;
; -5.309 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f3_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.348     ; 2.998      ;
; -5.271 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f13_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.349     ; 2.959      ;
; -5.269 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f13_db[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.349     ; 2.957      ;
; -5.268 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f13_db[0]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.349     ; 2.956      ;
; -5.268 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f13_db[4]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.349     ; 2.956      ;
; -5.268 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f1_db[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.342     ; 2.963      ;
; -5.267 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f13_db[7]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.349     ; 2.955      ;
; -5.266 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[0]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.344     ; 2.959      ;
; -5.266 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f5_db[2]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.330     ; 2.973      ;
; -5.266 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f5_db[7]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.330     ; 2.973      ;
; -5.266 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f5_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.330     ; 2.973      ;
; -5.249 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[7]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.331     ; 2.955      ;
; -5.247 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[1]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.356     ; 2.928      ;
; -5.246 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.341     ; 2.942      ;
; -5.245 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f7_db[1]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.328     ; 2.954      ;
; -5.245 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f7_db[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.328     ; 2.954      ;
; -5.242 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.356     ; 2.923      ;
; -5.241 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.360     ; 2.918      ;
; -5.240 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.360     ; 2.917      ;
; -5.236 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f12_db[7]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.330     ; 2.943      ;
; -5.235 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[7]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -2.360     ; 2.912      ;
+--------+-----------------------------------------+-----------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Setup: 'AUD_BCLK'                                                                                                                                                                                                                                                       ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                          ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
; -2.252 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[18]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.505      ;
; -2.252 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[19]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.505      ;
; -2.252 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[20]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.505      ;
; -2.252 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[21]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.505      ;
; -2.252 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[22]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.505      ;
; -2.252 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[15]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.505      ;
; -2.252 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[16]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.505      ;
; -2.252 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[17]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.505      ;
; -2.236 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[4] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.272      ;
; -2.191 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.227      ;
; -2.185 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[4] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.221      ;
; -2.174 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.428      ;
; -2.174 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.428      ;
; -2.174 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.428      ;
; -2.174 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.428      ;
; -2.174 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.428      ;
; -2.174 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.428      ;
; -2.174 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.428      ;
; -2.174 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.428      ;
; -2.174 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.428      ;
; -2.174 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.428      ;
; -2.174 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.428      ;
; -2.174 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[6]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.428      ;
; -2.174 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[7]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.428      ;
; -2.174 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.428      ;
; -2.174 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[9]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.428      ;
; -2.174 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[10]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.428      ;
; -2.165 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.201      ;
; -2.148 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[2] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[4] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.184      ;
; -2.144 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[18]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.397      ;
; -2.144 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[19]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.397      ;
; -2.144 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[20]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.397      ;
; -2.144 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[21]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.397      ;
; -2.144 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[22]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.397      ;
; -2.144 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[15]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.397      ;
; -2.144 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[16]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.397      ;
; -2.144 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[17]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.397      ;
; -2.136 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[4]  ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.172      ;
; -2.128 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.201      ; 3.365      ;
; -2.128 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[12]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.201      ; 3.365      ;
; -2.128 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[13]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.201      ; 3.365      ;
; -2.128 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.224      ; 3.388      ;
; -2.128 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.224      ; 3.388      ;
; -2.128 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.224      ; 3.388      ;
; -2.128 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.224      ; 3.388      ;
; -2.128 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.224      ; 3.388      ;
; -2.128 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.224      ; 3.388      ;
; -2.128 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.224      ; 3.388      ;
; -2.128 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.224      ; 3.388      ;
; -2.128 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.224      ; 3.388      ;
; -2.128 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.224      ; 3.388      ;
; -2.128 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.224      ; 3.388      ;
; -2.128 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[6]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.224      ; 3.388      ;
; -2.128 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[7]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.224      ; 3.388      ;
; -2.128 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.224      ; 3.388      ;
; -2.128 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[9]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.224      ; 3.388      ;
; -2.128 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[10]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.224      ; 3.388      ;
; -2.120 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.156      ;
; -2.114 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.150      ;
; -2.094 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[2] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.130      ;
; -2.082 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.207      ; 3.325      ;
; -2.082 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[12]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.207      ; 3.325      ;
; -2.082 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[13]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.207      ; 3.325      ;
; -2.077 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[2] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.113      ;
; -2.066 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.320      ;
; -2.066 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.320      ;
; -2.066 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.320      ;
; -2.066 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.320      ;
; -2.066 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.320      ;
; -2.066 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.320      ;
; -2.066 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.320      ;
; -2.066 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.320      ;
; -2.066 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.320      ;
; -2.066 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.320      ;
; -2.066 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.320      ;
; -2.066 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[6]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.320      ;
; -2.066 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[7]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.320      ;
; -2.066 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.320      ;
; -2.066 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[9]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.320      ;
; -2.066 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[10]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.218      ; 3.320      ;
; -2.065 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[3]  ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.101      ;
; -2.049 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.085      ;
; -2.043 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.079      ;
; -2.043 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[2] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 3.079      ;
; -2.029 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[5]                        ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.162      ; 3.227      ;
; -2.029 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[6]                        ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.162      ; 3.227      ;
; -2.024 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[18]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.277      ;
; -2.024 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[19]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.277      ;
; -2.024 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[20]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.277      ;
; -2.024 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[21]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.277      ;
; -2.024 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[22]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.277      ;
; -2.024 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[15]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.277      ;
; -2.024 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[16]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.277      ;
; -2.024 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[17]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.217      ; 3.277      ;
; -2.020 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.201      ; 3.257      ;
; -2.020 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[12]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.201      ; 3.257      ;
; -2.020 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[13]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.201      ; 3.257      ;
; -2.020 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.224      ; 3.280      ;
; -2.020 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.224      ; 3.280      ;
; -2.020 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.224      ; 3.280      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Setup: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                                                                                                                                              ;
+--------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                                  ; To Node                                                                   ; Launch Clock                                        ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; -2.085 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.045     ; 2.077      ;
; -2.085 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.045     ; 2.077      ;
; -2.085 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.045     ; 2.077      ;
; -1.937 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.047     ; 1.927      ;
; -1.937 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.047     ; 1.927      ;
; -1.937 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.047     ; 1.927      ;
; -1.937 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.047     ; 1.927      ;
; -1.937 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.047     ; 1.927      ;
; -1.937 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.047     ; 1.927      ;
; -1.937 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.047     ; 1.927      ;
; -1.937 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.047     ; 1.927      ;
; -1.840 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.053     ; 1.824      ;
; -1.840 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.053     ; 1.824      ;
; -1.694 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.056     ; 1.675      ;
; -1.694 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.056     ; 1.675      ;
; -1.694 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.056     ; 1.675      ;
; -1.671 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.045     ; 1.663      ;
; -1.627 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.051     ; 1.613      ;
; -1.595 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.056     ; 1.576      ;
; -1.593 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.056     ; 1.574      ;
; -1.593 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.056     ; 1.574      ;
; -1.590 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.056     ; 1.571      ;
; -1.538 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.056     ; 1.519      ;
; -1.527 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.047     ; 1.517      ;
; 2.119  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.412     ; 4.764      ;
; 2.119  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.412     ; 4.764      ;
; 2.119  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.412     ; 4.764      ;
; 2.381  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.420     ; 4.494      ;
; 2.381  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.420     ; 4.494      ;
; 2.577  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.418     ; 4.300      ;
; 76.021 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.011     ; 7.337      ;
; 76.064 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.005     ; 7.300      ;
; 76.172 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.011     ; 7.186      ;
; 77.526 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.003     ; 5.840      ;
; 77.555 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.003     ; 5.811      ;
; 77.720 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.011     ; 5.638      ;
; 79.543 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 3.826      ;
; 79.578 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 3.791      ;
; 80.166 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.006     ; 3.197      ;
; 80.166 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.006     ; 3.197      ;
; 80.383 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.006     ; 2.980      ;
; 80.383 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.006     ; 2.980      ;
; 80.763 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.008     ; 2.598      ;
; 80.763 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.008     ; 2.598      ;
; 81.160 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 2.215      ;
; 81.182 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.004      ; 2.191      ;
; 81.227 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.002     ; 2.140      ;
; 81.243 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.004     ; 2.122      ;
; 81.280 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.009     ; 2.080      ;
; 81.282 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 2.093      ;
; 81.319 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.011     ; 2.039      ;
; 81.352 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 2.023      ;
; 81.388 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.008      ; 1.989      ;
; 81.401 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.002     ; 1.966      ;
; 81.403 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.002     ; 1.964      ;
; 81.418 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.951      ;
; 81.430 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.002     ; 1.937      ;
; 81.520 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.008      ; 1.857      ;
; 81.535 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.834      ;
; 81.588 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.004      ; 1.785      ;
; 81.599 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.011      ; 1.781      ;
; 81.626 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.743      ;
; 81.637 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.732      ;
; 81.655 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.714      ;
; 81.665 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.704      ;
; 81.700 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.002      ; 1.671      ;
; 81.710 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.659      ;
; 81.718 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.651      ;
; 81.745 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.008     ; 1.616      ;
; 81.751 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.008     ; 1.610      ;
; 81.793 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.576      ;
; 81.796 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.573      ;
; 81.802 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.567      ;
; 81.850 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.519      ;
; 81.853 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.516      ;
; 81.865 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.006     ; 1.498      ;
; 81.881 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.005      ; 1.493      ;
; 81.893 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.002      ; 1.478      ;
; 81.897 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende            ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.472      ;
; 81.917 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.002      ; 1.454      ;
; 81.972 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.009     ; 1.388      ;
; 81.986 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 1.389      ;
; 81.994 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.375      ;
; 82.040 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.002     ; 1.327      ;
; 82.048 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.321      ;
; 82.061 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.308      ;
; 82.062 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.307      ;
; 82.063 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.306      ;
; 82.066 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.303      ;
; 82.072 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.002     ; 1.295      ;
; 82.099 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.270      ;
; 82.105 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.002     ; 1.262      ;
; 82.106 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.009      ; 1.272      ;
; 82.171 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.198      ;
; 82.224 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.145      ;
; 82.238 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.131      ;
; 82.253 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.002      ; 1.118      ;
; 82.272 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.097      ;
; 82.279 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.090      ;
; 82.293 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.076      ;
+--------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Setup: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'                                                                                                                                                                                                                                ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                 ; To Node                                                                       ; Launch Clock                                        ; Latch Clock                                            ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; 0.991 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[17] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[17] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.991      ; 2.036      ;
; 1.049 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[2]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[2]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 2.013      ; 2.000      ;
; 1.111 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[14] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[14] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.991      ; 1.916      ;
; 1.116 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[16] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[16] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.991      ; 1.911      ;
; 1.167 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[15] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[15] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.991      ; 1.860      ;
; 1.285 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[13] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[13] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.967      ; 1.718      ;
; 1.347 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[11] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[11] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.977      ; 1.666      ;
; 1.375 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[6]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[6]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.999      ; 1.660      ;
; 1.407 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[5]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[5]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.999      ; 1.628      ;
; 1.441 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[12] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[12] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.977      ; 1.572      ;
; 1.444 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[8]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[8]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.983      ; 1.575      ;
; 1.470 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[7]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[7]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.983      ; 1.549      ;
; 1.594 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[9]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[9]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.983      ; 1.425      ;
; 1.595 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[10] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[10] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.983      ; 1.424      ;
; 1.616 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[20] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[20] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.982      ; 1.402      ;
; 1.714 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[18] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[18] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.976      ; 1.298      ;
; 1.730 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[22] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[22] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.982      ; 1.288      ;
; 1.745 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[19] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[19] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.982      ; 1.273      ;
; 1.753 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[21] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[21] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.982      ; 1.265      ;
; 1.829 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[4]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.989      ; 1.196      ;
; 1.830 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[0]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[0]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.989      ; 1.195      ;
; 1.838 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[3]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[3]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.989      ; 1.187      ;
; 1.841 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[1]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[1]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.989      ; 1.184      ;
; 2.102 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[23] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[23] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.994      ; 0.928      ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Setup: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'                                                                                                                                                                                                                                ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                 ; To Node                                                                       ; Launch Clock                                        ; Latch Clock                                            ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; 1.365 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[18] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[18] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.074      ; 1.745      ;
; 1.424 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[23] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[23] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.084      ; 1.696      ;
; 1.479 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[20] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[20] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.087      ; 1.644      ;
; 1.487 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[22] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[22] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.087      ; 1.636      ;
; 1.491 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[10] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[10] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.087      ; 1.632      ;
; 1.492 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[21] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[21] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.087      ; 1.631      ;
; 1.547 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[11] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[11] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.074      ; 1.563      ;
; 1.563 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[14] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[14] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.074      ; 1.547      ;
; 1.593 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[19] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[19] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.087      ; 1.530      ;
; 1.613 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[9]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[9]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.087      ; 1.510      ;
; 1.635 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[15] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[15] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.074      ; 1.475      ;
; 1.646 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[0]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[0]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.089      ; 1.479      ;
; 1.668 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[12] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[12] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.074      ; 1.442      ;
; 1.697 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[16] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[16] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.074      ; 1.413      ;
; 1.697 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[13] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[13] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.074      ; 1.413      ;
; 1.697 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[8]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[8]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.080      ; 1.419      ;
; 1.702 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[17] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[17] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.074      ; 1.408      ;
; 1.702 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[7]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[7]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.080      ; 1.414      ;
; 1.892 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[3]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[3]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.082      ; 1.226      ;
; 1.921 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[2]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[2]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.082      ; 1.197      ;
; 1.924 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[1]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[1]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.082      ; 1.194      ;
; 1.926 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[6]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[6]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.082      ; 1.192      ;
; 1.926 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[5]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[5]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.082      ; 1.192      ;
; 1.943 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[4]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 2.082      ; 1.175      ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Setup: 'CLOCK_27'                                                                                                                                                             ;
+--------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
; Slack  ; From Node                                           ; To Node                                             ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
; 32.777 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.295      ;
; 32.831 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.241      ;
; 32.861 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.212      ;
; 32.864 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.209      ;
; 32.866 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.207      ;
; 32.869 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.204      ;
; 32.872 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.201      ;
; 32.872 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.201      ;
; 32.874 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.199      ;
; 32.875 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.198      ;
; 32.875 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.198      ;
; 32.911 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.161      ;
; 32.917 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 4.157      ;
; 32.920 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.152      ;
; 32.932 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.140      ;
; 32.935 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.137      ;
; 32.937 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.135      ;
; 32.940 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.132      ;
; 32.943 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.129      ;
; 32.943 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.129      ;
; 32.945 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.127      ;
; 32.946 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.126      ;
; 32.946 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.126      ;
; 32.957 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.115      ;
; 32.974 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.098      ;
; 32.993 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 4.081      ;
; 32.996 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.076      ;
; 32.999 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.073      ;
; 33.000 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.073      ;
; 33.001 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.071      ;
; 33.003 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.070      ;
; 33.004 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.068      ;
; 33.005 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.068      ;
; 33.007 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.065      ;
; 33.007 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.065      ;
; 33.008 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.065      ;
; 33.009 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.063      ;
; 33.010 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.062      ;
; 33.010 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.062      ;
; 33.011 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.062      ;
; 33.011 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.062      ;
; 33.013 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.060      ;
; 33.014 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.059      ;
; 33.014 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.059      ;
; 33.014 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.059      ;
; 33.017 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.056      ;
; 33.019 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.054      ;
; 33.022 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.051      ;
; 33.025 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.048      ;
; 33.025 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.048      ;
; 33.027 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.046      ;
; 33.028 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 4.046      ;
; 33.028 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.045      ;
; 33.028 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 4.045      ;
; 33.043 ; clock_generator:clock_generator_1|start_counter[11] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 4.031      ;
; 33.051 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 4.020      ;
; 33.054 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 4.018      ;
; 33.060 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 4.014      ;
; 33.100 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 3.972      ;
; 33.102 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 3.972      ;
; 33.105 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 3.966      ;
; 33.113 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 3.958      ;
; 33.114 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 3.957      ;
; 33.136 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 3.938      ;
; 33.161 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 3.911      ;
; 33.167 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 3.904      ;
; 33.168 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[17] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.905      ;
; 33.168 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.905      ;
; 33.168 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.905      ;
; 33.168 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 3.903      ;
; 33.169 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.904      ;
; 33.171 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 3.903      ;
; 33.177 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 3.895      ;
; 33.180 ; clock_generator:clock_generator_1|start_counter[11] ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.893      ;
; 33.180 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 3.892      ;
; 33.180 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 3.894      ;
; 33.180 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.893      ;
; 33.180 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 3.894      ;
; 33.182 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 3.890      ;
; 33.183 ; clock_generator:clock_generator_1|start_counter[11] ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.890      ;
; 33.185 ; clock_generator:clock_generator_1|start_counter[11] ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.888      ;
; 33.185 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 3.887      ;
; 33.185 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 3.886      ;
; 33.186 ; clock_generator:clock_generator_1|start_counter[11] ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.001      ; 3.888      ;
; 33.188 ; clock_generator:clock_generator_1|start_counter[11] ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.885      ;
; 33.188 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 3.884      ;
; 33.188 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 3.884      ;
; 33.190 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 3.882      ;
; 33.191 ; clock_generator:clock_generator_1|start_counter[11] ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.882      ;
; 33.191 ; clock_generator:clock_generator_1|start_counter[11] ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.882      ;
; 33.191 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 3.881      ;
; 33.191 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 3.880      ;
; 33.191 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.001     ; 3.881      ;
; 33.191 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.882      ;
; 33.193 ; clock_generator:clock_generator_1|start_counter[11] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.880      ;
; 33.194 ; clock_generator:clock_generator_1|start_counter[11] ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.879      ;
; 33.194 ; clock_generator:clock_generator_1|start_counter[11] ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.879      ;
; 33.202 ; clock_generator:clock_generator_1|start_counter[15] ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.871      ;
; 33.205 ; clock_generator:clock_generator_1|start_counter[15] ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.868      ;
; 33.207 ; clock_generator:clock_generator_1|start_counter[15] ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 3.866      ;
+--------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Setup: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'                                                                                                                                                                                                                                               ;
+--------+----------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                                  ; To Node                                                                    ; Launch Clock                                        ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+----------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; 97.374 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.662      ;
; 97.408 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.628      ;
; 97.495 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.541      ;
; 97.561 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.475      ;
; 97.595 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.441      ;
; 97.653 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.383      ;
; 97.682 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.354      ;
; 97.700 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.336      ;
; 97.734 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.302      ;
; 97.780 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.256      ;
; 97.837 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.199      ;
; 97.846 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.190      ;
; 97.958 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.078      ;
; 98.006 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 2.030      ;
; 98.052 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.984      ;
; 98.102 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.934      ;
; 98.118 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.918      ;
; 98.165 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.871      ;
; 98.190 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.846      ;
; 98.211 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.825      ;
; 98.222 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.814      ;
; 98.230 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.806      ;
; 98.236 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.800      ;
; 98.264 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.772      ;
; 98.277 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.759      ;
; 98.282 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.754      ;
; 98.289 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.747      ;
; 98.307 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.729      ;
; 98.312 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.724      ;
; 98.347 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.689      ;
; 98.348 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.688      ;
; 98.349 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.687      ;
; 98.353 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.683      ;
; 98.378 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.658      ;
; 98.383 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.653      ;
; 98.409 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.627      ;
; 98.419 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.617      ;
; 98.420 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.616      ;
; 98.423 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.613      ;
; 98.424 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.612      ;
; 98.471 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.565      ;
; 98.472 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.564      ;
; 98.490 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.546      ;
; 98.491 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.545      ;
; 98.494 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.542      ;
; 98.520 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.516      ;
; 98.534 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.502      ;
; 98.542 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.494      ;
; 98.542 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.494      ;
; 98.562 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.474      ;
; 98.565 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.471      ;
; 98.565 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.471      ;
; 98.566 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.470      ;
; 98.685 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.351      ;
; 98.810 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.226      ;
; 98.928 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.108      ;
; 98.928 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.108      ;
; 98.936 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.100      ;
; 98.936 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.100      ;
; 98.944 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.092      ;
; 98.947 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.089      ;
; 98.948 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.088      ;
; 98.974 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.062      ;
; 99.080 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.956      ;
; 99.223 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.813      ;
; 99.223 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.813      ;
; 99.379 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.657      ;
+--------+----------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Hold: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'                                                                                                                                                                                                                                  ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                 ; To Node                                                                       ; Launch Clock                                        ; Latch Clock                                            ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; -1.332 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[23] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[23] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.994      ; 0.928      ;
; -1.071 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[1]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[1]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.989      ; 1.184      ;
; -1.068 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[3]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[3]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.989      ; 1.187      ;
; -1.060 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[0]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[0]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.989      ; 1.195      ;
; -1.059 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[4]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.989      ; 1.196      ;
; -0.983 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[21] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[21] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.982      ; 1.265      ;
; -0.975 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[19] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[19] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.982      ; 1.273      ;
; -0.960 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[22] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[22] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.982      ; 1.288      ;
; -0.944 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[18] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[18] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.976      ; 1.298      ;
; -0.846 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[20] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[20] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.982      ; 1.402      ;
; -0.825 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[10] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[10] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.983      ; 1.424      ;
; -0.824 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[9]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[9]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.983      ; 1.425      ;
; -0.700 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[7]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[7]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.983      ; 1.549      ;
; -0.674 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[8]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[8]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.983      ; 1.575      ;
; -0.671 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[12] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[12] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.977      ; 1.572      ;
; -0.637 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[5]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[5]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.999      ; 1.628      ;
; -0.605 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[6]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[6]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.999      ; 1.660      ;
; -0.577 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[11] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[11] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.977      ; 1.666      ;
; -0.515 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[13] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[13] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.967      ; 1.718      ;
; -0.397 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[15] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[15] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.991      ; 1.860      ;
; -0.346 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[16] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[16] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.991      ; 1.911      ;
; -0.341 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[14] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[14] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.991      ; 1.916      ;
; -0.279 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[2]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[2]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 2.013      ; 2.000      ;
; -0.221 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[17] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[17] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.991      ; 2.036      ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Hold: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'                                                                                                                                                                                                                                  ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                 ; To Node                                                                       ; Launch Clock                                        ; Latch Clock                                            ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; -1.173 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[4]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.082      ; 1.175      ;
; -1.156 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[6]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[6]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.082      ; 1.192      ;
; -1.156 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[5]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[5]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.082      ; 1.192      ;
; -1.154 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[1]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[1]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.082      ; 1.194      ;
; -1.151 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[2]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[2]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.082      ; 1.197      ;
; -1.122 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[3]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[3]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.082      ; 1.226      ;
; -0.932 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[17] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[17] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.074      ; 1.408      ;
; -0.932 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[7]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[7]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.080      ; 1.414      ;
; -0.927 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[16] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[16] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.074      ; 1.413      ;
; -0.927 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[13] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[13] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.074      ; 1.413      ;
; -0.927 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[8]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[8]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.080      ; 1.419      ;
; -0.898 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[12] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[12] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.074      ; 1.442      ;
; -0.876 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[0]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[0]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.089      ; 1.479      ;
; -0.865 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[15] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[15] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.074      ; 1.475      ;
; -0.843 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[9]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[9]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.087      ; 1.510      ;
; -0.823 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[19] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[19] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.087      ; 1.530      ;
; -0.793 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[14] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[14] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.074      ; 1.547      ;
; -0.777 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[11] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[11] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.074      ; 1.563      ;
; -0.722 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[21] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[21] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.087      ; 1.631      ;
; -0.721 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[10] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[10] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.087      ; 1.632      ;
; -0.717 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[22] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[22] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.087      ; 1.636      ;
; -0.709 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[20] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[20] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.087      ; 1.644      ;
; -0.654 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[23] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[23] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.084      ; 1.696      ;
; -0.595 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[18] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[18] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 2.074      ; 1.745      ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Hold: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'                                                                                                                                                                                                                                             ;
+--------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+--------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                               ; To Node                                                                 ; Launch Clock                                           ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+--------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; -0.173 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.314      ; 0.657      ;
; -0.155 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.296      ; 0.657      ;
; 0.327  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; -0.500       ; 0.314      ; 0.657      ;
; 0.345  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; -0.500       ; 0.296      ; 0.657      ;
; 0.391  ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[1]                      ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[1]                      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[0]                      ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[0]                      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[1]                    ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[1]                    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[2]                    ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[2]                    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[3]                    ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[3]                    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[0]                    ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[0]                    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[2]                      ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[2]                      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[0]                      ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[0]                      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[3]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[3]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[6]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[6]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[2]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[2]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[4]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[4]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[7]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[7]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[5]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[5]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[3]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[3]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[0]       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[0]       ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[0]      ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[0]      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[7]      ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[7]      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[7]       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[7]       ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[23]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[23]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[9]       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[9]       ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[8]       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[8]       ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[11]      ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[11]      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[10]      ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[10]      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[11]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[11]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[8]      ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[8]      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[9]      ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[9]      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[10]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[10]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[22]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[22]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[21]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[21]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[0] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[2] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[2] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[1] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[7] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[7] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[0] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[1] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[3] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[3] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[2] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[2] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[20]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[20]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[4] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[4] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[6] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[6] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[5] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[5] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[54]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[54]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[56]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[56]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[60]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[60]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[54]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[54]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[58]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[58]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[59]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[59]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[17]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[17]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[20]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[20]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[20]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[20]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[21]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[21]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[21]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[21]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[22]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[22]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[22]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[22]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[23]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[23]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[23]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[23]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[16]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[16]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[20]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[20]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[20]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[20]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[20]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[20]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[20]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[20]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[21]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[21]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[21]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[21]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[21]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[21]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[21]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[21]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[22]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[22]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[22]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[22]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[22]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[22]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[22]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[22]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[23]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[23]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[23]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[23]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[23]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[23]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[23]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[23]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_12[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_12[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_10[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_10[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_5[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_5[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_7[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_7[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_14[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_14[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_13[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_13[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_4[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_4[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_3[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_3[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.657      ;
+--------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+--------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Hold: 'AUD_BCLK'                                                                                                                                                                                                                                                                                                 ;
+-------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------+-------------+--------------+------------+------------+
; Slack ; From Node                                                                                        ; To Node                                                                                          ; Launch Clock                                           ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------+-------------+--------------+------------+------------+
; 0.316 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[14]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.259      ; 0.841      ;
; 0.319 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[15]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.259      ; 0.844      ;
; 0.385 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[3]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[4]           ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.628      ; 0.779      ;
; 0.391 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enl                          ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enl                          ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enr                          ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enr                          ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.657      ;
; 0.396 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[0]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[1]           ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.628      ; 0.790      ;
; 0.397 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[2]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[3]           ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.628      ; 0.791      ;
; 0.398 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[4]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[5]           ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.628      ; 0.792      ;
; 0.443 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[12]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[13]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.580      ; 0.789      ;
; 0.444 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[16]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[17]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.580      ; 0.790      ;
; 0.445 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[11]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[12]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.580      ; 0.791      ;
; 0.454 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[21]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[22]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.563      ; 0.783      ;
; 0.460 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[20]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[21]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.563      ; 0.789      ;
; 0.460 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[17]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[18]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.580      ; 0.806      ;
; 0.461 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[19]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[20]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.563      ; 0.790      ;
; 0.462 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[8]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[9]           ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.563      ; 0.791      ;
; 0.463 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[7]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[8]           ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.563      ; 0.792      ;
; 0.493 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[5]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[6]           ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.530      ; 0.789      ;
; 0.494 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[6]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[7]           ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.530      ; 0.790      ;
; 0.494 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[2]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[3]           ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.530      ; 0.790      ;
; 0.494 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[1]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[2]           ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.530      ; 0.790      ;
; 0.496 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[21]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[22]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.529      ; 0.791      ;
; 0.496 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[9]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[10]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.529      ; 0.791      ;
; 0.496 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[3]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[4]           ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.530      ; 0.792      ;
; 0.496 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[0]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[1]           ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.530      ; 0.792      ;
; 0.497 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[22]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[23]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.529      ; 0.792      ;
; 0.497 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[20]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[21]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.529      ; 0.792      ;
; 0.497 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[10]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[11]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.529      ; 0.792      ;
; 0.497 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[8]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[9]           ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.529      ; 0.792      ;
; 0.497 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[4]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[5]           ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.530      ; 0.793      ;
; 0.498 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[19]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[20]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.529      ; 0.793      ;
; 0.521 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[4]  ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.787      ;
; 0.521 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[13]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[14]          ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.787      ;
; 0.525 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]                      ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]                      ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.791      ;
; 0.528 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[1]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[2]           ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.628      ; 0.922      ;
; 0.529 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.795      ;
; 0.532 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.798      ;
; 0.532 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[6]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[7]           ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.628      ; 0.926      ;
; 0.532 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[5]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[6]           ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.628      ; 0.926      ;
; 0.541 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[11]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[12]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.478      ; 0.785      ;
; 0.543 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[16]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[17]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.478      ; 0.787      ;
; 0.548 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[18]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[19]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.478      ; 0.792      ;
; 0.548 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[17]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[18]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.478      ; 0.792      ;
; 0.549 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[15]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[16]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.478      ; 0.793      ;
; 0.549 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[14]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[15]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.478      ; 0.793      ;
; 0.549 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[12]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[13]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.478      ; 0.793      ;
; 0.553 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.259      ; 1.078      ;
; 0.558 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.259      ; 1.083      ;
; 0.558 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.259      ; 1.083      ;
; 0.560 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.826      ;
; 0.566 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[14]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[15]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.580      ; 0.912      ;
; 0.575 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[13]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[14]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.580      ; 0.921      ;
; 0.580 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[18]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[19]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.580      ; 0.926      ;
; 0.581 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[15]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[16]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.580      ; 0.927      ;
; 0.583 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[10]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[11]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.563      ; 0.912      ;
; 0.586 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[6]                        ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.162      ; 1.014      ;
; 0.587 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[5]                        ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.162      ; 1.015      ;
; 0.594 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[9]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[10]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.563      ; 0.923      ;
; 0.597 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[22]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[23]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK    ; -0.500       ; 0.563      ; 0.926      ;
; 0.602 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[23]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|dacdat                     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.423      ; 0.791      ;
; 0.629 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[7]                     ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[8]           ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.529      ; 0.924      ;
; 0.645 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[1]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[2]           ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.911      ;
; 0.648 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[15]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[16]          ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.914      ;
; 0.648 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[4]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[5]           ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.914      ;
; 0.650 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[5]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[6]           ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.916      ;
; 0.651 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[16]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[17]          ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.917      ;
; 0.652 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[17]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[18]          ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.918      ;
; 0.655 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[18]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[19]          ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.921      ;
; 0.657 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]                      ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]                      ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.923      ;
; 0.663 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[13]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[14]          ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.929      ;
; 0.674 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[13]                    ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[14]          ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK    ; -0.500       ; 0.478      ; 0.918      ;
; 0.683 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[13]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[13]                       ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.949      ;
; 0.702 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]                      ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[9]                        ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.013      ; 0.981      ;
; 0.716 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[4] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[4] ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.982      ;
; 0.722 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[15]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.988      ;
; 0.742 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[12]                       ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.008      ;
; 0.744 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[11]                       ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.010      ;
; 0.780 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[23]                       ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.245      ; 1.291      ;
; 0.781 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[0]                        ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.245      ; 1.292      ;
; 0.784 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[2]                        ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.245      ; 1.295      ;
; 0.784 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[5]                        ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.245      ; 1.295      ;
; 0.785 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[1]                        ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.245      ; 1.296      ;
; 0.788 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[4]                        ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.245      ; 1.299      ;
; 0.788 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[2]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[2]  ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.054      ;
; 0.790 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[3]                        ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.245      ; 1.301      ;
; 0.794 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[12]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[13]                     ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.060      ;
; 0.794 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[3]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[4]           ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.060      ;
; 0.795 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.061      ;
; 0.795 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[1] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[1] ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.061      ;
; 0.798 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[21]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[22]          ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.064      ;
; 0.798 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[2]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[3]           ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.064      ;
; 0.799 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[18]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[19]          ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.065      ;
; 0.799 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[17]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[18]          ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.065      ;
; 0.799 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[9]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[10]          ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.065      ;
; 0.799 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[8]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[9]           ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.065      ;
; 0.799 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[6]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[7]           ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.065      ;
; 0.799 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[4]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[5]           ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.065      ;
; 0.800 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[20]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[21]          ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.066      ;
; 0.800 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[9]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[10]          ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.066      ;
; 0.800 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[8]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[9]           ; AUD_BCLK                                               ; AUD_BCLK    ; 0.000        ; 0.000      ; 1.066      ;
+-------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------+-------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Hold: 'CLOCK_27'                                                                                                                                                             ;
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
; Slack ; From Node                                           ; To Node                                             ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
; 0.391 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.657      ;
; 1.195 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.461      ;
; 1.201 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.467      ;
; 1.234 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.500      ;
; 1.330 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.596      ;
; 1.339 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.605      ;
; 1.508 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.774      ;
; 1.579 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.845      ;
; 1.584 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.850      ;
; 1.601 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.867      ;
; 1.675 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.941      ;
; 1.715 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.981      ;
; 1.717 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[17] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.983      ;
; 1.724 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.990      ;
; 1.754 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.020      ;
; 1.769 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.035      ;
; 1.789 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.055      ;
; 1.789 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.055      ;
; 1.790 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.056      ;
; 1.812 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.078      ;
; 1.866 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.132      ;
; 1.868 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.135      ;
; 1.871 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.137      ;
; 1.871 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.137      ;
; 1.872 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.138      ;
; 1.891 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.157      ;
; 1.914 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.180      ;
; 1.919 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.185      ;
; 1.920 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.186      ;
; 1.931 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.198      ;
; 1.956 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.222      ;
; 1.963 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.229      ;
; 1.977 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.244      ;
; 1.977 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.244      ;
; 1.978 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.245      ;
; 1.997 ; clock_generator:clock_generator_1|start_counter[18] ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.263      ;
; 2.030 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.297      ;
; 2.052 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.318      ;
; 2.057 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.323      ;
; 2.057 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.323      ;
; 2.057 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.324      ;
; 2.059 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.326      ;
; 2.060 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.327      ;
; 2.063 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[13] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.329      ;
; 2.063 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[14] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.329      ;
; 2.063 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.331      ;
; 2.065 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.332      ;
; 2.068 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.336      ;
; 2.068 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.336      ;
; 2.069 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.337      ;
; 2.071 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.339      ;
; 2.073 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.339      ;
; 2.076 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.343      ;
; 2.076 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.344      ;
; 2.076 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.344      ;
; 2.077 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.345      ;
; 2.088 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.355      ;
; 2.090 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[17] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.356      ;
; 2.092 ; clock_generator:clock_generator_1|start_counter[15] ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.358      ;
; 2.093 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.359      ;
; 2.098 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.364      ;
; 2.099 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|reset             ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.365      ;
; 2.099 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.365      ;
; 2.103 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.369      ;
; 2.107 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.374      ;
; 2.109 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.376      ;
; 2.113 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.379      ;
; 2.134 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.401      ;
; 2.136 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.003     ; 2.399      ;
; 2.137 ; clock_generator:clock_generator_1|start_counter[13] ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.403      ;
; 2.142 ; clock_generator:clock_generator_1|start_counter[13] ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.408      ;
; 2.142 ; clock_generator:clock_generator_1|start_counter[13] ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.408      ;
; 2.143 ; clock_generator:clock_generator_1|start_counter[13] ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.409      ;
; 2.145 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|start_counter[13] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.411      ;
; 2.145 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|start_counter[14] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.411      ;
; 2.156 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.423      ;
; 2.158 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.425      ;
; 2.164 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.430      ;
; 2.169 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.435      ;
; 2.175 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.441      ;
; 2.181 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|reset             ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.447      ;
; 2.183 ; clock_generator:clock_generator_1|start_counter[15] ; clock_generator:clock_generator_1|start_counter[17] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.449      ;
; 2.193 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[13] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.459      ;
; 2.193 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[14] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.459      ;
; 2.206 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.472      ;
; 2.206 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.472      ;
; 2.207 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.003     ; 2.470      ;
; 2.210 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.477      ;
; 2.229 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|reset             ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.495      ;
; 2.230 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.496      ;
; 2.252 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.001      ; 2.519      ;
; 2.255 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.523      ;
; 2.256 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.003      ; 2.525      ;
; 2.257 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.003      ; 2.526      ;
; 2.257 ; clock_generator:clock_generator_1|start_counter[15] ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 2.523      ;
; 2.260 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.528      ;
; 2.260 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.528      ;
; 2.261 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 2.529      ;
; 2.262 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.001     ; 2.527      ;
; 2.264 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.003      ; 2.533      ;
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Hold: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'                                                                                                                                                                                                                                               ;
+-------+----------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                  ; To Node                                                                    ; Launch Clock                                        ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+-------+----------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; 0.391 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.547 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.813      ;
; 0.547 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.813      ;
; 0.690 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.956      ;
; 0.796 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.062      ;
; 0.822 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.088      ;
; 0.823 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.089      ;
; 0.826 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.092      ;
; 0.833 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.099      ;
; 0.834 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.100      ;
; 0.834 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.100      ;
; 0.842 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.108      ;
; 0.842 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.108      ;
; 0.960 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.226      ;
; 1.085 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.351      ;
; 1.204 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.470      ;
; 1.205 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.471      ;
; 1.205 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.471      ;
; 1.208 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.474      ;
; 1.228 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.494      ;
; 1.228 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.494      ;
; 1.236 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.502      ;
; 1.250 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.516      ;
; 1.276 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.542      ;
; 1.279 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.545      ;
; 1.280 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.546      ;
; 1.298 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.564      ;
; 1.299 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.565      ;
; 1.346 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.612      ;
; 1.347 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.613      ;
; 1.350 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.616      ;
; 1.351 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.617      ;
; 1.361 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.627      ;
; 1.387 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.653      ;
; 1.392 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.658      ;
; 1.417 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.683      ;
; 1.421 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.687      ;
; 1.422 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.688      ;
; 1.423 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.689      ;
; 1.458 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.724      ;
; 1.463 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.729      ;
; 1.481 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.747      ;
; 1.488 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.754      ;
; 1.493 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.759      ;
; 1.506 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.772      ;
; 1.534 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.800      ;
; 1.548 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.814      ;
; 1.559 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.825      ;
; 1.580 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.846      ;
; 1.605 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.871      ;
; 1.652 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.918      ;
; 1.654 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.920      ;
; 1.668 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.934      ;
; 1.712 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.978      ;
; 1.718 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.984      ;
; 1.764 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 2.030      ;
; 1.812 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 2.078      ;
; 1.899 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 2.165      ;
; 1.930 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 2.196      ;
; 1.933 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 2.199      ;
; 2.088 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 2.354      ;
; 2.117 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 2.383      ;
; 2.209 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 2.475      ;
; 2.275 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 2.541      ;
; 2.362 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 2.628      ;
; 2.396 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 2.662      ;
+-------+----------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Hold: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                                                                                                                                              ;
+-------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                  ; To Node                                                                   ; Launch Clock                                        ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+-------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende            ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.391 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.657      ;
; 0.523 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.789      ;
; 0.539 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.805      ;
; 0.569 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.835      ;
; 0.569 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.835      ;
; 0.577 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.843      ;
; 0.583 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.849      ;
; 0.680 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.946      ;
; 0.682 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.948      ;
; 0.713 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.002      ; 0.981      ;
; 0.748 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.014      ;
; 0.768 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.002     ; 1.032      ;
; 0.772 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.002      ; 1.040      ;
; 0.792 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.058      ;
; 0.799 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.065      ;
; 0.806 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.072      ;
; 0.810 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.076      ;
; 0.824 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.090      ;
; 0.831 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.097      ;
; 0.850 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.002      ; 1.118      ;
; 0.865 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.131      ;
; 0.879 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.145      ;
; 0.932 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.198      ;
; 0.997 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.009      ; 1.272      ;
; 0.998 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.002     ; 1.262      ;
; 1.004 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.270      ;
; 1.031 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.002     ; 1.295      ;
; 1.037 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.303      ;
; 1.039 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.008     ; 1.297      ;
; 1.040 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.306      ;
; 1.041 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.307      ;
; 1.055 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.321      ;
; 1.063 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.002     ; 1.327      ;
; 1.109 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.375      ;
; 1.117 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.006      ; 1.389      ;
; 1.131 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.009     ; 1.388      ;
; 1.186 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.002      ; 1.454      ;
; 1.206 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende            ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.472      ;
; 1.210 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.002      ; 1.478      ;
; 1.222 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.005      ; 1.493      ;
; 1.238 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.006     ; 1.498      ;
; 1.250 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.516      ;
; 1.251 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.517      ;
; 1.253 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.519      ;
; 1.298 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.047     ; 1.517      ;
; 1.301 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.567      ;
; 1.307 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.573      ;
; 1.309 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.056     ; 1.519      ;
; 1.310 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.576      ;
; 1.350 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.008     ; 1.608      ;
; 1.352 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.008     ; 1.610      ;
; 1.357 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.623      ;
; 1.358 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.008     ; 1.616      ;
; 1.361 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.056     ; 1.571      ;
; 1.364 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.056     ; 1.574      ;
; 1.364 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.056     ; 1.574      ;
; 1.366 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.056     ; 1.576      ;
; 1.385 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.651      ;
; 1.398 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.051     ; 1.613      ;
; 1.403 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.002      ; 1.671      ;
; 1.438 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.704      ;
; 1.442 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.045     ; 1.663      ;
; 1.465 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.056     ; 1.675      ;
; 1.465 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.056     ; 1.675      ;
; 1.465 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.056     ; 1.675      ;
; 1.466 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.732      ;
; 1.477 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.743      ;
; 1.504 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.011      ; 1.781      ;
; 1.515 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.004      ; 1.785      ;
; 1.568 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.834      ;
; 1.583 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.008      ; 1.857      ;
; 1.611 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.053     ; 1.824      ;
; 1.611 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.053     ; 1.824      ;
; 1.673 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.002     ; 1.937      ;
; 1.685 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.951      ;
; 1.700 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.002     ; 1.964      ;
; 1.702 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.002     ; 1.966      ;
; 1.708 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.047     ; 1.927      ;
; 1.708 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.047     ; 1.927      ;
; 1.708 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.047     ; 1.927      ;
; 1.708 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.047     ; 1.927      ;
; 1.708 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.047     ; 1.927      ;
; 1.708 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.047     ; 1.927      ;
; 1.708 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.047     ; 1.927      ;
; 1.708 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.047     ; 1.927      ;
; 1.715 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.008      ; 1.989      ;
; 1.751 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.006      ; 2.023      ;
; 1.784 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.011     ; 2.039      ;
; 1.821 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.006      ; 2.093      ;
+-------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Recovery: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                                                                ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                               ; To Node                                                                   ; Launch Clock ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; 2.749 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.423     ; 4.123      ;
; 2.749 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.423     ; 4.123      ;
; 2.749 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.423     ; 4.123      ;
; 2.749 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.423     ; 4.123      ;
; 2.749 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.423     ; 4.123      ;
; 2.749 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.423     ; 4.123      ;
; 2.749 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.423     ; 4.123      ;
; 2.749 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.423     ; 4.123      ;
; 2.985 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.414     ; 3.896      ;
; 2.985 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.414     ; 3.896      ;
; 2.985 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.414     ; 3.896      ;
; 2.985 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.414     ; 3.896      ;
; 2.985 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.414     ; 3.896      ;
; 2.985 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.414     ; 3.896      ;
; 2.985 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.414     ; 3.896      ;
; 2.985 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.414     ; 3.896      ;
; 2.985 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.414     ; 3.896      ;
; 2.990 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -2.412     ; 3.893      ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Removal: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                                                                 ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                               ; To Node                                                                   ; Launch Clock ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; 6.040 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.412     ; 3.893      ;
; 6.045 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.414     ; 3.896      ;
; 6.045 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.414     ; 3.896      ;
; 6.045 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.414     ; 3.896      ;
; 6.045 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.414     ; 3.896      ;
; 6.045 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.414     ; 3.896      ;
; 6.045 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.414     ; 3.896      ;
; 6.045 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.414     ; 3.896      ;
; 6.045 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.414     ; 3.896      ;
; 6.045 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.414     ; 3.896      ;
; 6.281 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.423     ; 4.123      ;
; 6.281 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.423     ; 4.123      ;
; 6.281 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.423     ; 4.123      ;
; 6.281 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.423     ; 4.123      ;
; 6.281 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.423     ; 4.123      ;
; 6.281 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.423     ; 4.123      ;
; 6.281 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.423     ; 4.123      ;
; 6.281 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -2.423     ; 4.123      ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width: 'AUD_BCLK'                                                                                                                               ;
+--------+--------------+----------------+------------------+----------+------------+--------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                                               ;
+--------+--------------+----------------+------------------+----------+------------+--------------------------------------------------------------------------------------+
; -1.222 ; 1.000        ; 2.222          ; Port Rate        ; AUD_BCLK ; Rise       ; AUD_BCLK                                                                             ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[0]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[0]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[2]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[2]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[0] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[0] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[10]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[10]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[12]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[12]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[13]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[13]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[14]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[14]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[15]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[15]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[6]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[6]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[7]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[7]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[9]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[9]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[0]            ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[0]            ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[10]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[10]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[11]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[11]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[12]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[12]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[13]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[13]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[14]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[14]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[15]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[15]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[16]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[16]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[17]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[17]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[18]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[18]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[19]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[19]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[1]            ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[1]            ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[20]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[20]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[21]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[21]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[22]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[22]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[23]           ;
+--------+--------------+----------------+------------------+----------+------------+--------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'                                                                                                                        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                  ; Clock Edge ; Target                                                                        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[0]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[0]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[10] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[10] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[11] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[11] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[12] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[12] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[13] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[13] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[14] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[14] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[15] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[15] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[16] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[16] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[17] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[17] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[18] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[18] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[19] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[19] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[1]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[1]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[20] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[20] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[21] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[21] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[22] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[22] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[23] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[23] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[2]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[2]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[3]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[3]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[4]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[4]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[5]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[5]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[6]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[6]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[7]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[7]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[8]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[8]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[9]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[9]  ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[0]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[0]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[10]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[10]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[11]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[11]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[12]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[12]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[13]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[13]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[14]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[14]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[15]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[15]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[16]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[16]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[17]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[17]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[18]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[18]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[19]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[19]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[1]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[1]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[20]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[20]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[21]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[21]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[22]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[22]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[23]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[23]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[2]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[2]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[3]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[3]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[4]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[4]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[5]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[5]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[6]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[6]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[7]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[7]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[8]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[8]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[9]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[9]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|filter_unit_1|enql|regout                                        ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|filter_unit_1|enql|regout                                        ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|filter_unit_1|enql~clkctrl|inclk[0]                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|filter_unit_1|enql~clkctrl|inclk[0]                              ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'                                                                                                                        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                  ; Clock Edge ; Target                                                                        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[0]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[0]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[10] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[10] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[11] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[11] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[12] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[12] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[13] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[13] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[14] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[14] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[15] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[15] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[16] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[16] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[17] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[17] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[18] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[18] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[19] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[19] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[1]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[1]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[20] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[20] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[21] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[21] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[22] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[22] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[23] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[23] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[2]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[2]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[3]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[3]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[4]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[4]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[5]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[5]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[6]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[6]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[7]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[7]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[8]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[8]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[9]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[9]  ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[0]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[0]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[10]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[10]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[11]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[11]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[12]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[12]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[13]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[13]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[14]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[14]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[15]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[15]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[16]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[16]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[17]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[17]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[18]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[18]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[19]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[19]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[1]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[1]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[20]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[20]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[21]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[21]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[22]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[22]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[23]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[23]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[2]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[2]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[3]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[3]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[4]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[4]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[5]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[5]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[6]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[6]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[7]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[7]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[8]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[8]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[9]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[9]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|filter_unit_1|enqr|regout                                        ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|filter_unit_1|enqr|regout                                        ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|filter_unit_1|enqr~clkctrl|inclk[0]                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|filter_unit_1|enqr~clkctrl|inclk[0]                              ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'                                                                                                                                                                ;
+-------+--------------+----------------+------------------+-----------------------------------------------------+------------+------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                               ; Clock Edge ; Target                                                                                                                 ;
+-------+--------------+----------------+------------------+-----------------------------------------------------+------------+------------------------------------------------------------------------------------------------------------------------+
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_2 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_3 ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[30]              ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[30]              ;
; 8.077 ; 10.000       ; 1.923          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[30]~_Duplicate_1 ;
; 8.077 ; 10.000       ; 1.923          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[30]~_Duplicate_1 ;
+-------+--------------+----------------+------------------+-----------------------------------------------------+------------+------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width: 'CLOCK_50'                                                                                                ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+
; 10.000 ; 10.000       ; 0.000          ; High Pulse Width ; CLOCK_50 ; Rise       ; CLOCK_50|combout                                      ;
; 10.000 ; 10.000       ; 0.000          ; Low Pulse Width  ; CLOCK_50 ; Rise       ; CLOCK_50|combout                                      ;
; 10.000 ; 10.000       ; 0.000          ; High Pulse Width ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0]   ;
; 10.000 ; 10.000       ; 0.000          ; Low Pulse Width  ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0]   ;
; 10.000 ; 10.000       ; 0.000          ; High Pulse Width ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[1]   ;
; 10.000 ; 10.000       ; 0.000          ; Low Pulse Width  ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[1]   ;
; 10.000 ; 10.000       ; 0.000          ; High Pulse Width ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|inclk[0] ;
; 10.000 ; 10.000       ; 0.000          ; Low Pulse Width  ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|inclk[0] ;
; 17.620 ; 20.000       ; 2.380          ; Port Rate        ; CLOCK_50 ; Rise       ; CLOCK_50                                              ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width: 'CLOCK_27'                                                                                                ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|reset               ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[0]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[10]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[11]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[12]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[13]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[14]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[15]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[16]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[17]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[18]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[19]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[1]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[20]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[21]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[22]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[23]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[24]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[25]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[2]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[3]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[4]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[5]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[6]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[7]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[8]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[9]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|reset               ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[0]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[10]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[11]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[12]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[13]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[14]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[15]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[16]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[17]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[18]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[19]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[1]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[20]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[21]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[22]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[23]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[24]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[25]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[2]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[3]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[4]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[5]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[6]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[7]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[8]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[9]    ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; CLOCK_27|combout                                      ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; CLOCK_27~clkctrl|inclk[0]                             ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; CLOCK_27~clkctrl|outclk                               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1]   ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|inclk[0] ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|reset|clk                           ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[0]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[10]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[11]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[12]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[13]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[14]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[15]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[16]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[17]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[18]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[19]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[1]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[20]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[21]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[22]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[23]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[24]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[25]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[2]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[3]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[4]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[5]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[6]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[7]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[8]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[9]|clk                ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; CLOCK_27|combout                                      ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; CLOCK_27~clkctrl|inclk[0]                             ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; CLOCK_27~clkctrl|outclk                               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1]   ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|inclk[0] ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|reset|clk                           ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[0]|clk                ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[10]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[11]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[12]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[13]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[14]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[15]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[16]|clk               ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                    ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+---------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                               ; Clock Edge ; Target                                                                    ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+---------------------------------------------------------------------------+
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[0]|clk                               ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[1]|clk                               ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[2]|clk                               ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[3]|clk                               ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[0]|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[1]|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[2]|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[3]|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SCLK|clk                                        ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SDIN~en|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SDIN~reg0|clk                                   ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Sektion[0]|clk                                  ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Sektion[1]|clk                                  ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack_warten2|clk                      ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack_warten|clk                       ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack|clk                              ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.anfangszustand|clk                   ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.bit_n|clk                            ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ende|clk                             ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.error|clk                            ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.startbedingung|clk                   ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.stop_warten|clk                      ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.stopbedingung|clk                    ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.taktende|clk                         ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_2|altpll_component|_clk1~clkctrl|inclk[0]           ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_2|altpll_component|_clk1~clkctrl|outclk             ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[0]|clk                               ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[1]|clk                               ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[2]|clk                               ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[3]|clk                               ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[0]|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[1]|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[2]|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[3]|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SCLK|clk                                        ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SDIN~en|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SDIN~reg0|clk                                   ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Sektion[0]|clk                                  ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Sektion[1]|clk                                  ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack_warten2|clk                      ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack_warten|clk                       ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack|clk                              ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.anfangszustand|clk                   ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.bit_n|clk                            ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ende|clk                             ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.error|clk                            ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.startbedingung|clk                   ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.stop_warten|clk                      ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.stopbedingung|clk                    ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.taktende|clk                         ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_2|altpll_component|_clk1~clkctrl|inclk[0]           ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_2|altpll_component|_clk1~clkctrl|outclk             ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+---------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Model Minimum Pulse Width: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'                                                                                                                     ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                               ; Clock Edge ; Target                                                                     ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------+
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[0]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[0]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[1]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[1]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[2]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[2]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[3]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[3]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[4]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[4]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[5]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[5]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[6]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[6]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[7]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[7]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[8]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[8]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|clk_400kHz|clk                           ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|clk_400kHz|clk                           ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_1|altpll_component|_clk1~clkctrl|inclk[0]            ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_1|altpll_component|_clk1~clkctrl|inclk[0]            ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_1|altpll_component|_clk1~clkctrl|outclk              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_1|altpll_component|_clk1~clkctrl|outclk              ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                   ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; Data Port   ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                     ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; AUD_ADCDAT  ; AUD_BCLK   ; 3.859  ; 3.859  ; Rise       ; AUD_BCLK                                            ;
; AUD_ADCLRCK ; AUD_BCLK   ; 5.843  ; 5.843  ; Rise       ; AUD_BCLK                                            ;
; AUD_DACLRCK ; AUD_BCLK   ; 5.069  ; 5.069  ; Fall       ; AUD_BCLK                                            ;
; SW[*]       ; CLOCK_27   ; 5.450  ; 5.450  ; Rise       ; CLOCK_27                                            ;
;  SW[17]     ; CLOCK_27   ; 5.450  ; 5.450  ; Rise       ; CLOCK_27                                            ;
; KEY[*]      ; CLOCK_50   ; 11.218 ; 11.218 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[0]     ; CLOCK_50   ; 10.487 ; 10.487 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[1]     ; CLOCK_50   ; 11.218 ; 11.218 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[2]     ; CLOCK_50   ; 9.152  ; 9.152  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[3]     ; CLOCK_50   ; 9.400  ; 9.400  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; 5.334  ; 5.334  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[2]      ; CLOCK_50   ; 3.895  ; 3.895  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[3]      ; CLOCK_50   ; 5.334  ; 5.334  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; 4.231  ; 4.231  ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[1]      ; CLOCK_50   ; 4.231  ; 4.231  ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; I2C_SDAT    ; CLOCK_27   ; 7.522  ; 7.522  ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                    ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; Data Port   ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                     ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; AUD_ADCDAT  ; AUD_BCLK   ; -3.093 ; -3.093 ; Rise       ; AUD_BCLK                                            ;
; AUD_ADCLRCK ; AUD_BCLK   ; -3.525 ; -3.525 ; Rise       ; AUD_BCLK                                            ;
; AUD_DACLRCK ; AUD_BCLK   ; -3.123 ; -3.123 ; Fall       ; AUD_BCLK                                            ;
; SW[*]       ; CLOCK_27   ; -4.571 ; -4.571 ; Rise       ; CLOCK_27                                            ;
;  SW[17]     ; CLOCK_27   ; -4.571 ; -4.571 ; Rise       ; CLOCK_27                                            ;
; KEY[*]      ; CLOCK_50   ; -6.701 ; -6.701 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[0]     ; CLOCK_50   ; -7.129 ; -7.129 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[1]     ; CLOCK_50   ; -6.998 ; -6.998 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[2]     ; CLOCK_50   ; -6.701 ; -6.701 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[3]     ; CLOCK_50   ; -7.200 ; -7.200 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; -2.212 ; -2.212 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[2]      ; CLOCK_50   ; -2.212 ; -2.212 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[3]      ; CLOCK_50   ; -2.381 ; -2.381 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; -2.212 ; -2.212 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[1]      ; CLOCK_50   ; -2.212 ; -2.212 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; I2C_SDAT    ; CLOCK_27   ; -6.494 ; -6.494 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                        ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                     ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; AUD_DACDAT   ; AUD_BCLK   ; 7.057 ; 7.057 ; Fall       ; AUD_BCLK                                            ;
; LCD_DATA[*]  ; CLOCK_50   ; 6.954 ; 6.954 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[0] ; CLOCK_50   ; 5.971 ; 5.971 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[1] ; CLOCK_50   ; 6.297 ; 6.297 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[2] ; CLOCK_50   ; 6.561 ; 6.561 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[3] ; CLOCK_50   ; 5.803 ; 5.803 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[4] ; CLOCK_50   ; 6.954 ; 6.954 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[5] ; CLOCK_50   ; 5.620 ; 5.620 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[6] ; CLOCK_50   ; 6.641 ; 6.641 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[7] ; CLOCK_50   ; 6.120 ; 6.120 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_EN       ; CLOCK_50   ; 7.748 ; 7.748 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_RS       ; CLOCK_50   ; 5.490 ; 5.490 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX0[*]      ; CLOCK_50   ; 6.427 ; 6.427 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[2]     ; CLOCK_50   ; 6.084 ; 6.084 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[3]     ; CLOCK_50   ; 6.427 ; 6.427 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[4]     ; CLOCK_50   ; 6.262 ; 6.262 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[5]     ; CLOCK_50   ; 6.085 ; 6.085 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[6]     ; CLOCK_50   ; 5.862 ; 5.862 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX1[*]      ; CLOCK_50   ; 7.155 ; 7.155 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[1]     ; CLOCK_50   ; 5.770 ; 5.770 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[2]     ; CLOCK_50   ; 5.690 ; 5.690 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[3]     ; CLOCK_50   ; 7.154 ; 7.154 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[4]     ; CLOCK_50   ; 6.269 ; 6.269 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[6]     ; CLOCK_50   ; 7.155 ; 7.155 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX2[*]      ; CLOCK_50   ; 5.421 ; 5.421 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[0]     ; CLOCK_50   ; 5.389 ; 5.389 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[1]     ; CLOCK_50   ; 5.320 ; 5.320 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[2]     ; CLOCK_50   ; 5.421 ; 5.421 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[3]     ; CLOCK_50   ; 5.403 ; 5.403 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[4]     ; CLOCK_50   ; 4.762 ; 4.762 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[5]     ; CLOCK_50   ; 5.413 ; 5.413 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[6]     ; CLOCK_50   ; 5.383 ; 5.383 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX3[*]      ; CLOCK_50   ; 5.598 ; 5.598 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[0]     ; CLOCK_50   ; 5.598 ; 5.598 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[1]     ; CLOCK_50   ; 5.442 ; 5.442 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[2]     ; CLOCK_50   ; 5.092 ; 5.092 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[3]     ; CLOCK_50   ; 5.126 ; 5.126 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[4]     ; CLOCK_50   ; 5.011 ; 5.011 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[5]     ; CLOCK_50   ; 5.115 ; 5.115 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[6]     ; CLOCK_50   ; 5.045 ; 5.045 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX4[*]      ; CLOCK_50   ; 5.782 ; 5.782 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX4[6]     ; CLOCK_50   ; 5.782 ; 5.782 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX6[*]      ; CLOCK_50   ; 5.833 ; 5.833 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[0]     ; CLOCK_50   ; 5.076 ; 5.076 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[1]     ; CLOCK_50   ; 4.986 ; 4.986 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[2]     ; CLOCK_50   ; 4.362 ; 4.362 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[3]     ; CLOCK_50   ; 5.080 ; 5.080 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[4]     ; CLOCK_50   ; 5.637 ; 5.637 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[5]     ; CLOCK_50   ; 5.833 ; 5.833 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[6]     ; CLOCK_50   ; 5.200 ; 5.200 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX7[*]      ; CLOCK_50   ; 6.193 ; 6.193 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[0]     ; CLOCK_50   ; 5.695 ; 5.695 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[1]     ; CLOCK_50   ; 6.193 ; 6.193 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[2]     ; CLOCK_50   ; 6.163 ; 6.163 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[3]     ; CLOCK_50   ; 5.665 ; 5.665 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[4]     ; CLOCK_50   ; 5.665 ; 5.665 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[5]     ; CLOCK_50   ; 5.977 ; 5.977 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; AUD_XCK      ; CLOCK_27   ; 2.917 ;       ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SCLK     ; CLOCK_27   ; 5.014 ; 5.014 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SDAT     ; CLOCK_27   ; 5.223 ; 5.223 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; AUD_XCK      ; CLOCK_27   ;       ; 2.917 ; Fall       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                     ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; AUD_DACDAT   ; AUD_BCLK   ; 7.057 ; 7.057 ; Fall       ; AUD_BCLK                                            ;
; LCD_DATA[*]  ; CLOCK_50   ; 5.620 ; 5.620 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[0] ; CLOCK_50   ; 5.971 ; 5.971 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[1] ; CLOCK_50   ; 6.297 ; 6.297 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[2] ; CLOCK_50   ; 6.561 ; 6.561 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[3] ; CLOCK_50   ; 5.803 ; 5.803 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[4] ; CLOCK_50   ; 6.954 ; 6.954 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[5] ; CLOCK_50   ; 5.620 ; 5.620 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[6] ; CLOCK_50   ; 6.641 ; 6.641 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[7] ; CLOCK_50   ; 6.120 ; 6.120 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_EN       ; CLOCK_50   ; 7.748 ; 7.748 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_RS       ; CLOCK_50   ; 5.490 ; 5.490 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX0[*]      ; CLOCK_50   ; 5.862 ; 5.862 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[2]     ; CLOCK_50   ; 6.084 ; 6.084 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[3]     ; CLOCK_50   ; 6.427 ; 6.427 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[4]     ; CLOCK_50   ; 6.262 ; 6.262 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[5]     ; CLOCK_50   ; 6.085 ; 6.085 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[6]     ; CLOCK_50   ; 5.862 ; 5.862 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX1[*]      ; CLOCK_50   ; 5.690 ; 5.690 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[1]     ; CLOCK_50   ; 5.770 ; 5.770 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[2]     ; CLOCK_50   ; 5.690 ; 5.690 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[3]     ; CLOCK_50   ; 7.154 ; 7.154 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[4]     ; CLOCK_50   ; 6.269 ; 6.269 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[6]     ; CLOCK_50   ; 7.155 ; 7.155 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX2[*]      ; CLOCK_50   ; 4.762 ; 4.762 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[0]     ; CLOCK_50   ; 5.389 ; 5.389 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[1]     ; CLOCK_50   ; 5.320 ; 5.320 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[2]     ; CLOCK_50   ; 5.421 ; 5.421 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[3]     ; CLOCK_50   ; 5.403 ; 5.403 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[4]     ; CLOCK_50   ; 4.762 ; 4.762 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[5]     ; CLOCK_50   ; 5.413 ; 5.413 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[6]     ; CLOCK_50   ; 5.383 ; 5.383 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX3[*]      ; CLOCK_50   ; 5.011 ; 5.011 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[0]     ; CLOCK_50   ; 5.598 ; 5.598 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[1]     ; CLOCK_50   ; 5.442 ; 5.442 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[2]     ; CLOCK_50   ; 5.092 ; 5.092 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[3]     ; CLOCK_50   ; 5.126 ; 5.126 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[4]     ; CLOCK_50   ; 5.011 ; 5.011 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[5]     ; CLOCK_50   ; 5.115 ; 5.115 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[6]     ; CLOCK_50   ; 5.045 ; 5.045 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX4[*]      ; CLOCK_50   ; 5.782 ; 5.782 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX4[6]     ; CLOCK_50   ; 5.782 ; 5.782 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX6[*]      ; CLOCK_50   ; 4.362 ; 4.362 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[0]     ; CLOCK_50   ; 5.076 ; 5.076 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[1]     ; CLOCK_50   ; 4.986 ; 4.986 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[2]     ; CLOCK_50   ; 4.362 ; 4.362 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[3]     ; CLOCK_50   ; 5.080 ; 5.080 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[4]     ; CLOCK_50   ; 5.637 ; 5.637 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[5]     ; CLOCK_50   ; 5.833 ; 5.833 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[6]     ; CLOCK_50   ; 5.200 ; 5.200 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX7[*]      ; CLOCK_50   ; 5.665 ; 5.665 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[0]     ; CLOCK_50   ; 5.695 ; 5.695 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[1]     ; CLOCK_50   ; 6.193 ; 6.193 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[2]     ; CLOCK_50   ; 6.163 ; 6.163 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[3]     ; CLOCK_50   ; 5.665 ; 5.665 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[4]     ; CLOCK_50   ; 5.665 ; 5.665 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[5]     ; CLOCK_50   ; 5.977 ; 5.977 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; AUD_XCK      ; CLOCK_27   ; 2.917 ;       ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SCLK     ; CLOCK_27   ; 5.014 ; 5.014 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SDAT     ; CLOCK_27   ; 5.223 ; 5.223 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; AUD_XCK      ; CLOCK_27   ;       ; 2.917 ; Fall       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+


+----------------------------------------------------+
; Propagation Delay                                  ;
+------------+-------------+----+-------+-------+----+
; Input Port ; Output Port ; RR ; RF    ; FR    ; FF ;
+------------+-------------+----+-------+-------+----+
; SW[0]      ; AUD_DACDAT  ;    ; 7.122 ; 7.122 ;    ;
+------------+-------------+----+-------+-------+----+


+----------------------------------------------------+
; Minimum Propagation Delay                          ;
+------------+-------------+----+-------+-------+----+
; Input Port ; Output Port ; RR ; RF    ; FR    ; FF ;
+------------+-------------+----+-------+-------+----+
; SW[0]      ; AUD_DACDAT  ;    ; 7.122 ; 7.122 ;    ;
+------------+-------------+----+-------+-------+----+


+----------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                      ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+
; Data Port ; Clock Port ; Rise  ; Fall ; Clock Edge ; Clock Reference                                     ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+
; I2C_SDAT  ; CLOCK_27   ; 5.340 ;      ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                              ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+
; Data Port ; Clock Port ; Rise  ; Fall ; Clock Edge ; Clock Reference                                     ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+
; I2C_SDAT  ; CLOCK_27   ; 5.340 ;      ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                              ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+
; Data Port ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                     ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+
; I2C_SDAT  ; CLOCK_27   ; 5.340     ;           ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                      ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+
; Data Port ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                     ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+
; I2C_SDAT  ; CLOCK_27   ; 5.340     ;           ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+


+---------------------------------------------------------------------------------+
; Fast Model Setup Summary                                                        ;
+--------------------------------------------------------+--------+---------------+
; Clock                                                  ; Slack  ; End Point TNS ;
+--------------------------------------------------------+--------+---------------+
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; -3.281 ; -638.963      ;
; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; -1.038 ; -21.810       ;
; AUD_BCLK                                               ; -0.572 ; -50.909       ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.388  ; 0.000         ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.582  ; 0.000         ;
; CLOCK_27                                               ; 35.033 ; 0.000         ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 98.827 ; 0.000         ;
+--------------------------------------------------------+--------+---------------+


+---------------------------------------------------------------------------------+
; Fast Model Hold Summary                                                         ;
+--------------------------------------------------------+--------+---------------+
; Clock                                                  ; Slack  ; End Point TNS ;
+--------------------------------------------------------+--------+---------------+
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; -1.012 ; -18.156       ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; -0.973 ; -20.345       ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 0.007  ; 0.000         ;
; AUD_BCLK                                               ; 0.150  ; 0.000         ;
; CLOCK_27                                               ; 0.215  ; 0.000         ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 0.215  ; 0.000         ;
; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 0.215  ; 0.000         ;
+--------------------------------------------------------+--------+---------------+


+-----------------------------------------------------------------------------+
; Fast Model Recovery Summary                                                 ;
+-----------------------------------------------------+-------+---------------+
; Clock                                               ; Slack ; End Point TNS ;
+-----------------------------------------------------+-------+---------------+
; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 5.507 ; 0.000         ;
+-----------------------------------------------------+-------+---------------+


+-----------------------------------------------------------------------------+
; Fast Model Removal Summary                                                  ;
+-----------------------------------------------------+-------+---------------+
; Clock                                               ; Slack ; End Point TNS ;
+-----------------------------------------------------+-------+---------------+
; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 3.522 ; 0.000         ;
+-----------------------------------------------------+-------+---------------+


+---------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width Summary                                          ;
+--------------------------------------------------------+--------+---------------+
; Clock                                                  ; Slack  ; End Point TNS ;
+--------------------------------------------------------+--------+---------------+
; AUD_BCLK                                               ; -1.222 ; -142.222      ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; -0.500 ; -24.000       ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; -0.500 ; -24.000       ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 7.981  ; 0.000         ;
; CLOCK_50                                               ; 10.000 ; 0.000         ;
; CLOCK_27                                               ; 17.518 ; 0.000         ;
; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 40.666 ; 0.000         ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 49.000 ; 0.000         ;
+--------------------------------------------------------+--------+---------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Setup: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'                                                                                                                                                    ;
+--------+-----------------------------------------+-----------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                               ; To Node                                                   ; Launch Clock ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------+-----------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; -3.281 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.556     ; 1.758      ;
; -3.281 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[4]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.556     ; 1.758      ;
; -3.279 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.755      ;
; -3.279 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[7]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.755      ;
; -3.279 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[3]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.755      ;
; -3.261 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[21] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.716      ;
; -3.261 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[22] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.716      ;
; -3.261 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[20] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.716      ;
; -3.261 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[27] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.716      ;
; -3.261 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[14] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.716      ;
; -3.261 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[15] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.716      ;
; -3.261 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[19] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.716      ;
; -3.261 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[18] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.716      ;
; -3.261 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[16] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.716      ;
; -3.261 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[17] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.716      ;
; -3.261 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[26] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.716      ;
; -3.261 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[25] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.716      ;
; -3.261 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[24] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.716      ;
; -3.261 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[23] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.578     ; 1.716      ;
; -3.216 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[0]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.556     ; 1.693      ;
; -3.216 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.556     ; 1.693      ;
; -3.216 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[5]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.556     ; 1.693      ;
; -3.157 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f5_db[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.555     ; 1.635      ;
; -3.134 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.556     ; 1.611      ;
; -3.134 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[3]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.556     ; 1.611      ;
; -3.130 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[12] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.570     ; 1.593      ;
; -3.130 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[11] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.570     ; 1.593      ;
; -3.130 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[10] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.570     ; 1.593      ;
; -3.130 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[9]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.570     ; 1.593      ;
; -3.130 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[4]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.570     ; 1.593      ;
; -3.130 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[13] ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.570     ; 1.593      ;
; -3.130 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[1]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.570     ; 1.593      ;
; -3.130 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[3]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.570     ; 1.593      ;
; -3.130 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[2]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.570     ; 1.593      ;
; -3.130 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[0]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.570     ; 1.593      ;
; -3.130 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[8]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.570     ; 1.593      ;
; -3.130 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[5]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.570     ; 1.593      ;
; -3.130 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[6]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.570     ; 1.593      ;
; -3.130 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|clk_counter[7]  ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.570     ; 1.593      ;
; -3.120 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.570     ; 1.583      ;
; -3.118 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[3]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.556     ; 1.595      ;
; -3.118 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f3_db[1]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.573     ; 1.578      ;
; -3.111 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f6_db[2]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.556     ; 1.588      ;
; -3.109 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.556     ; 1.586      ;
; -3.109 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.556     ; 1.586      ;
; -3.095 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f12_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.571     ; 1.557      ;
; -3.095 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f9_db[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.576     ; 1.552      ;
; -3.094 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f3_db[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.566     ; 1.561      ;
; -3.091 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.558     ; 1.566      ;
; -3.083 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[4]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.559      ;
; -3.083 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.559      ;
; -3.058 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[0]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.579     ; 1.512      ;
; -3.056 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f3_db[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.573     ; 1.516      ;
; -3.056 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[2]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.583     ; 1.506      ;
; -3.054 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f6_db[7]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.561     ; 1.526      ;
; -3.050 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.585     ; 1.498      ;
; -3.049 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f12_db[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.561     ; 1.521      ;
; -3.049 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f8_db[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.585     ; 1.497      ;
; -3.049 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f6_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.561     ; 1.521      ;
; -3.048 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f6_db[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.561     ; 1.520      ;
; -3.033 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f9_db[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.581     ; 1.485      ;
; -3.032 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.566     ; 1.499      ;
; -3.031 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f1_db[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.566     ; 1.498      ;
; -3.031 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f9_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.581     ; 1.483      ;
; -3.022 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f13_db[4]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.572     ; 1.483      ;
; -3.021 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f13_db[7]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.572     ; 1.482      ;
; -3.021 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f5_db[2]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.555     ; 1.499      ;
; -3.021 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f5_db[7]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.555     ; 1.499      ;
; -3.021 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f5_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.555     ; 1.499      ;
; -3.020 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f13_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.572     ; 1.481      ;
; -3.019 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f13_db[1]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.572     ; 1.480      ;
; -3.017 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f13_db[0]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.572     ; 1.478      ;
; -3.013 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[1]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.579     ; 1.467      ;
; -3.012 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.579     ; 1.466      ;
; -3.011 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.583     ; 1.461      ;
; -3.010 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.560     ; 1.483      ;
; -3.010 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.583     ; 1.460      ;
; -3.008 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[6]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.565     ; 1.476      ;
; -3.007 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[2]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.565     ; 1.475      ;
; -3.007 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[4]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.583     ; 1.457      ;
; -3.004 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f2_db[7]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.583     ; 1.454      ;
; -3.003 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f3_db[7]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.572     ; 1.464      ;
; -3.003 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f3_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.572     ; 1.464      ;
; -3.002 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f3_db[4]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.572     ; 1.463      ;
; -3.001 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f3_db[2]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.572     ; 1.462      ;
; -3.001 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f1_db[4]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.560     ; 1.474      ;
; -3.000 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|vol_db[3]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.565     ; 1.468      ;
; -2.999 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[0]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.559     ; 1.473      ;
; -2.999 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f7_db[3]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.557     ; 1.475      ;
; -2.998 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[1]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.559     ; 1.472      ;
; -2.997 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[2]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.559     ; 1.471      ;
; -2.996 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[6]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.559     ; 1.470      ;
; -2.993 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[4]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.560     ; 1.466      ;
; -2.992 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f1_db[5]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.566     ; 1.459      ;
; -2.992 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f4_db[7]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.560     ; 1.465      ;
; -2.983 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f9_db[2]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.581     ; 1.435      ;
; -2.982 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[3]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.581     ; 1.434      ;
; -2.981 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f9_db[7]        ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.581     ; 1.433      ;
; -2.980 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f10_db[7]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.556     ; 1.457      ;
; -2.977 ; clock_generator:clock_generator_1|reset ; MMI:MMI_1|mmi_controller:mmi_controller_1|f11_db[0]       ; CLOCK_27     ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.001        ; -1.569     ; 1.441      ;
+--------+-----------------------------------------+-----------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Setup: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                                                                                                                                              ;
+--------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                                  ; To Node                                                                   ; Launch Clock                                        ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; -1.038 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.036     ; 1.035      ;
; -1.038 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.036     ; 1.035      ;
; -1.038 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.036     ; 1.035      ;
; -0.992 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.038     ; 0.987      ;
; -0.992 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.038     ; 0.987      ;
; -0.992 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.038     ; 0.987      ;
; -0.992 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.038     ; 0.987      ;
; -0.992 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.038     ; 0.987      ;
; -0.992 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.038     ; 0.987      ;
; -0.992 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.038     ; 0.987      ;
; -0.992 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.038     ; 0.987      ;
; -0.943 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.044     ; 0.932      ;
; -0.943 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.044     ; 0.932      ;
; -0.893 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.047     ; 0.879      ;
; -0.893 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.047     ; 0.879      ;
; -0.893 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.047     ; 0.879      ;
; -0.879 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.036     ; 0.876      ;
; -0.841 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.042     ; 0.832      ;
; -0.758 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.047     ; 0.744      ;
; -0.756 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.047     ; 0.742      ;
; -0.755 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.047     ; 0.741      ;
; -0.753 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.047     ; 0.739      ;
; -0.729 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.047     ; 0.715      ;
; -0.724 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.001        ; -0.038     ; 0.719      ;
; 5.265  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.627     ; 2.399      ;
; 5.265  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.627     ; 2.399      ;
; 5.265  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.627     ; 2.399      ;
; 5.370  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.635     ; 2.286      ;
; 5.370  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.635     ; 2.286      ;
; 5.462  ; clock_generator:clock_generator_1|reset                                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; CLOCK_27                                            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.633     ; 2.196      ;
; 80.135 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.011     ; 3.219      ;
; 80.169 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.005     ; 3.191      ;
; 80.213 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.011     ; 3.141      ;
; 80.782 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.003     ; 2.580      ;
; 80.786 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.003     ; 2.576      ;
; 80.886 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.011     ; 2.468      ;
; 81.687 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.678      ;
; 81.700 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 1.665      ;
; 81.821 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.006     ; 1.538      ;
; 81.821 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.006     ; 1.538      ;
; 81.901 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.006     ; 1.458      ;
; 81.901 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.006     ; 1.458      ;
; 82.048 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.008     ; 1.309      ;
; 82.048 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.008     ; 1.309      ;
; 82.345 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 1.026      ;
; 82.364 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.004      ; 1.005      ;
; 82.368 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.004     ; 0.993      ;
; 82.369 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.002     ; 0.994      ;
; 82.410 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 0.961      ;
; 82.413 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.009     ; 0.943      ;
; 82.419 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.011     ; 0.935      ;
; 82.434 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 0.937      ;
; 82.435 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.008      ; 0.938      ;
; 82.436 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.002     ; 0.927      ;
; 82.460 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.002     ; 0.903      ;
; 82.472 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.893      ;
; 82.474 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.891      ;
; 82.479 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.002     ; 0.884      ;
; 82.512 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.004      ; 0.857      ;
; 82.512 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.008      ; 0.861      ;
; 82.535 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.830      ;
; 82.546 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.011      ; 0.830      ;
; 82.551 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.814      ;
; 82.555 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.810      ;
; 82.556 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.809      ;
; 82.585 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.780      ;
; 82.592 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.008     ; 0.765      ;
; 82.594 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.771      ;
; 82.598 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.008     ; 0.759      ;
; 82.598 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.002      ; 0.769      ;
; 82.599 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.766      ;
; 82.606 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.759      ;
; 82.630 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.735      ;
; 82.635 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.730      ;
; 82.651 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.006     ; 0.708      ;
; 82.655 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.710      ;
; 82.666 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.005      ; 0.704      ;
; 82.673 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.002      ; 0.694      ;
; 82.676 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.009     ; 0.680      ;
; 82.677 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende            ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.688      ;
; 82.678 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.002      ; 0.689      ;
; 82.714 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.006      ; 0.657      ;
; 82.715 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.650      ;
; 82.719 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.646      ;
; 82.724 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.641      ;
; 82.727 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.002     ; 0.636      ;
; 82.732 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.002     ; 0.631      ;
; 82.734 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; -0.002     ; 0.629      ;
; 82.738 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.627      ;
; 82.740 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.625      ;
; 82.745 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.620      ;
; 82.746 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.009      ; 0.628      ;
; 82.746 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.619      ;
; 82.779 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.586      ;
; 82.791 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.574      ;
; 82.799 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.566      ;
; 82.805 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.002      ; 0.562      ;
; 82.815 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.550      ;
; 82.834 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.531      ;
; 82.834 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 83.333       ; 0.000      ; 0.531      ;
+--------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Setup: 'AUD_BCLK'                                                                                                                                                                                                                                                       ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
; Slack  ; From Node                                                                                        ; To Node                                                                                          ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
; -0.572 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[18]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.700      ;
; -0.572 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[19]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.700      ;
; -0.572 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[20]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.700      ;
; -0.572 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[21]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.700      ;
; -0.572 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[22]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.700      ;
; -0.572 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[15]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.700      ;
; -0.572 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[16]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.700      ;
; -0.572 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[17]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.700      ;
; -0.526 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.649      ;
; -0.526 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.649      ;
; -0.526 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.649      ;
; -0.526 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.649      ;
; -0.526 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.649      ;
; -0.526 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.649      ;
; -0.526 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.649      ;
; -0.526 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.649      ;
; -0.526 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.649      ;
; -0.526 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.649      ;
; -0.526 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.649      ;
; -0.526 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[6]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.649      ;
; -0.526 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[7]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.649      ;
; -0.526 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.649      ;
; -0.526 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[9]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.649      ;
; -0.526 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[10]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.649      ;
; -0.523 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[18]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.651      ;
; -0.523 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[19]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.651      ;
; -0.523 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[20]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.651      ;
; -0.523 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[21]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.651      ;
; -0.523 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[22]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.651      ;
; -0.523 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[15]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.651      ;
; -0.523 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[16]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.651      ;
; -0.523 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[17]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.651      ;
; -0.500 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.626      ;
; -0.500 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.626      ;
; -0.500 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.626      ;
; -0.500 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.626      ;
; -0.500 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.626      ;
; -0.500 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.626      ;
; -0.500 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.626      ;
; -0.500 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.626      ;
; -0.500 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.626      ;
; -0.500 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.626      ;
; -0.500 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.626      ;
; -0.500 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[6]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.626      ;
; -0.500 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[7]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.626      ;
; -0.500 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.626      ;
; -0.500 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[9]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.626      ;
; -0.500 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[10]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.626      ;
; -0.477 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.600      ;
; -0.477 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.600      ;
; -0.477 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.600      ;
; -0.477 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.600      ;
; -0.477 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.600      ;
; -0.477 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.600      ;
; -0.477 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.600      ;
; -0.477 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.600      ;
; -0.477 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.600      ;
; -0.477 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.600      ;
; -0.477 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.600      ;
; -0.477 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[6]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.600      ;
; -0.477 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[7]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.600      ;
; -0.477 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.600      ;
; -0.477 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[9]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.600      ;
; -0.477 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[10]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.091      ; 1.600      ;
; -0.471 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.106      ; 1.609      ;
; -0.471 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[12]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.106      ; 1.609      ;
; -0.471 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[13]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.106      ; 1.609      ;
; -0.462 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[4] ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.000      ; 1.494      ;
; -0.454 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[18]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.582      ;
; -0.454 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[19]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.582      ;
; -0.454 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[20]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.582      ;
; -0.454 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[21]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.582      ;
; -0.454 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[22]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.582      ;
; -0.454 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[15]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.582      ;
; -0.454 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[16]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.582      ;
; -0.454 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[17]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.096      ; 1.582      ;
; -0.449 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[5]                        ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.079      ; 1.560      ;
; -0.449 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[6]                        ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.079      ; 1.560      ;
; -0.448 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[10]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.105      ; 1.585      ;
; -0.448 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[6]                        ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.105      ; 1.585      ;
; -0.448 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[7]                        ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.105      ; 1.585      ;
; -0.448 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[8]                        ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.105      ; 1.585      ;
; -0.448 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[9]                        ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.105      ; 1.585      ;
; -0.448 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[11]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.105      ; 1.585      ;
; -0.448 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[12]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.105      ; 1.585      ;
; -0.448 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[13]                       ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.105      ; 1.585      ;
; -0.445 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.109      ; 1.586      ;
; -0.445 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[12]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.109      ; 1.586      ;
; -0.445 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[13]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.109      ; 1.586      ;
; -0.438 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[4]  ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; -0.012     ; 1.458      ;
; -0.438 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[3]  ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; -0.012     ; 1.458      ;
; -0.438 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[2]  ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; -0.012     ; 1.458      ;
; -0.438 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[1]  ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; -0.012     ; 1.458      ;
; -0.438 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[0]  ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; -0.012     ; 1.458      ;
; -0.436 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.562      ;
; -0.436 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.562      ;
; -0.436 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.562      ;
; -0.436 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.562      ;
; -0.436 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]                     ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.562      ;
; -0.436 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]                      ; AUD_BCLK     ; AUD_BCLK    ; 1.000        ; 0.094      ; 1.562      ;
+--------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Setup: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'                                                                                                                                                                                                                                ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                 ; To Node                                                                       ; Launch Clock                                        ; Latch Clock                                            ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; 1.388 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[17] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[17] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.336      ; 0.980      ;
; 1.435 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[2]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[2]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.356      ; 0.953      ;
; 1.464 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[15] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[15] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.336      ; 0.904      ;
; 1.464 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[14] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[14] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.336      ; 0.904      ;
; 1.466 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[16] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[16] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.336      ; 0.902      ;
; 1.531 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[13] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[13] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.314      ; 0.815      ;
; 1.558 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[6]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[6]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.343      ; 0.817      ;
; 1.564 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[11] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[11] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.323      ; 0.791      ;
; 1.578 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[5]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[5]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.343      ; 0.797      ;
; 1.587 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[12] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[12] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.323      ; 0.768      ;
; 1.591 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[8]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[8]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.328      ; 0.769      ;
; 1.607 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[7]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[7]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.328      ; 0.753      ;
; 1.663 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[20] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[20] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.328      ; 0.697      ;
; 1.684 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[10] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[10] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.328      ; 0.676      ;
; 1.684 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[9]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[9]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.328      ; 0.676      ;
; 1.721 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[18] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[18] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.323      ; 0.634      ;
; 1.733 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[22] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[22] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.328      ; 0.627      ;
; 1.741 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[19] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[19] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.328      ; 0.619      ;
; 1.747 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[21] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[21] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.328      ; 0.613      ;
; 1.792 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[4]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.334      ; 0.574      ;
; 1.792 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[0]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[0]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.334      ; 0.574      ;
; 1.796 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[3]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[3]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.334      ; 0.570      ;
; 1.798 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[1]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[1]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.334      ; 0.568      ;
; 1.892 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[23] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[23] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 1.000        ; 1.339      ; 0.479      ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Setup: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'                                                                                                                                                                                                                                ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                 ; To Node                                                                       ; Launch Clock                                        ; Latch Clock                                            ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; 1.582 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[18] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[18] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.388      ; 0.838      ;
; 1.626 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[23] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[23] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.394      ; 0.800      ;
; 1.628 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[20] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[20] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.398      ; 0.802      ;
; 1.630 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[22] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[22] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.398      ; 0.800      ;
; 1.630 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[21] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[21] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.398      ; 0.800      ;
; 1.632 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[10] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[10] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.398      ; 0.798      ;
; 1.658 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[11] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[11] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.388      ; 0.762      ;
; 1.668 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[14] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[14] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.388      ; 0.752      ;
; 1.681 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[19] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[19] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.398      ; 0.749      ;
; 1.706 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[9]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[9]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.398      ; 0.724      ;
; 1.714 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[15] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[15] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.388      ; 0.706      ;
; 1.725 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[0]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[0]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.399      ; 0.706      ;
; 1.734 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[12] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[12] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.388      ; 0.686      ;
; 1.749 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[13] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[13] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.388      ; 0.671      ;
; 1.750 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[16] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[16] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.388      ; 0.670      ;
; 1.752 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[8]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[8]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.392      ; 0.672      ;
; 1.753 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[17] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[17] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.388      ; 0.667      ;
; 1.756 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[7]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[7]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.392      ; 0.668      ;
; 1.834 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[3]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[3]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.393      ; 0.591      ;
; 1.849 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[4]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.393      ; 0.576      ;
; 1.850 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[2]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[2]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.393      ; 0.575      ;
; 1.852 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[1]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[1]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.393      ; 0.573      ;
; 1.853 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[6]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[6]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.393      ; 0.572      ;
; 1.853 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[5]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[5]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.000        ; 1.393      ; 0.572      ;
+-------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Setup: 'CLOCK_27'                                                                                                                                                             ;
+--------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
; Slack  ; From Node                                           ; To Node                                             ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
; 35.033 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.036      ;
; 35.058 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 2.011      ;
; 35.098 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.971      ;
; 35.103 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.966      ;
; 35.127 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.942      ;
; 35.128 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.941      ;
; 35.145 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.002      ; 1.926      ;
; 35.166 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.002      ; 1.905      ;
; 35.167 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.900      ;
; 35.168 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.901      ;
; 35.172 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.897      ;
; 35.173 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.896      ;
; 35.174 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.895      ;
; 35.174 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.895      ;
; 35.175 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.894      ;
; 35.176 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.893      ;
; 35.177 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.892      ;
; 35.178 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.891      ;
; 35.183 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.884      ;
; 35.185 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.884      ;
; 35.186 ; clock_generator:clock_generator_1|start_counter[11] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.002      ; 1.885      ;
; 35.189 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.002      ; 1.882      ;
; 35.192 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.875      ;
; 35.197 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.872      ;
; 35.199 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.870      ;
; 35.199 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.868      ;
; 35.200 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.867      ;
; 35.201 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.866      ;
; 35.201 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.866      ;
; 35.202 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.865      ;
; 35.203 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.864      ;
; 35.204 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.863      ;
; 35.205 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.862      ;
; 35.208 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.859      ;
; 35.212 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.855      ;
; 35.215 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.002      ; 1.856      ;
; 35.224 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.845      ;
; 35.226 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.843      ;
; 35.227 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.002      ; 1.844      ;
; 35.227 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.842      ;
; 35.227 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.840      ;
; 35.228 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.841      ;
; 35.228 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.841      ;
; 35.229 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.840      ;
; 35.229 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.838      ;
; 35.230 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.839      ;
; 35.230 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.837      ;
; 35.231 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.838      ;
; 35.231 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.836      ;
; 35.231 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.836      ;
; 35.232 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.835      ;
; 35.232 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.837      ;
; 35.232 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.835      ;
; 35.233 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.834      ;
; 35.234 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.833      ;
; 35.235 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.832      ;
; 35.236 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.002      ; 1.835      ;
; 35.239 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.830      ;
; 35.242 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.825      ;
; 35.243 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.826      ;
; 35.244 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.825      ;
; 35.245 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.824      ;
; 35.245 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.824      ;
; 35.246 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.823      ;
; 35.247 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.822      ;
; 35.248 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.821      ;
; 35.248 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.819      ;
; 35.249 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.820      ;
; 35.252 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.815      ;
; 35.254 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.813      ;
; 35.256 ; clock_generator:clock_generator_1|start_counter[11] ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.002      ; 1.815      ;
; 35.256 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.813      ;
; 35.259 ; clock_generator:clock_generator_1|start_counter[7]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.002      ; 1.812      ;
; 35.261 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.806      ;
; 35.263 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[14] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.806      ;
; 35.264 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.803      ;
; 35.264 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.805      ;
; 35.267 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.800      ;
; 35.272 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[9]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.795      ;
; 35.273 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[11] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.794      ;
; 35.274 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.793      ;
; 35.274 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[12] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.793      ;
; 35.275 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[8]  ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.792      ;
; 35.276 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.791      ;
; 35.277 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.790      ;
; 35.277 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.790      ;
; 35.278 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[10] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.789      ;
; 35.279 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.790      ;
; 35.285 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.782      ;
; 35.288 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[14] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.781      ;
; 35.289 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.778      ;
; 35.291 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.776      ;
; 35.292 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.775      ;
; 35.292 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; -0.002     ; 1.775      ;
; 35.293 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.776      ;
; 35.295 ; clock_generator:clock_generator_1|start_counter[9]  ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.774      ;
; 35.297 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.002      ; 1.774      ;
; 35.300 ; clock_generator:clock_generator_1|start_counter[10] ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.769      ;
; 35.301 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[17] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.768      ;
; 35.301 ; clock_generator:clock_generator_1|start_counter[8]  ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 37.037       ; 0.000      ; 1.768      ;
+--------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Setup: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'                                                                                                                                                                                                                                               ;
+--------+----------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                                  ; To Node                                                                    ; Launch Clock                                        ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+--------+----------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; 98.827 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.205      ;
; 98.835 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.197      ;
; 98.898 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.134      ;
; 98.900 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.132      ;
; 98.908 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.124      ;
; 98.962 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.070      ;
; 98.971 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.061      ;
; 99.001 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.031      ;
; 99.007 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.025      ;
; 99.022 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.010      ;
; 99.027 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 1.005      ;
; 99.060 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.972      ;
; 99.081 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.951      ;
; 99.093 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.939      ;
; 99.101 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.931      ;
; 99.127 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.905      ;
; 99.134 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.898      ;
; 99.168 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.864      ;
; 99.175 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.857      ;
; 99.195 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.837      ;
; 99.197 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.835      ;
; 99.200 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.832      ;
; 99.206 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.826      ;
; 99.210 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.822      ;
; 99.210 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.822      ;
; 99.228 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.804      ;
; 99.230 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.802      ;
; 99.236 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.796      ;
; 99.245 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.787      ;
; 99.258 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.774      ;
; 99.262 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.770      ;
; 99.263 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.769      ;
; 99.265 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.767      ;
; 99.270 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.762      ;
; 99.280 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.752      ;
; 99.283 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.749      ;
; 99.297 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.735      ;
; 99.298 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.734      ;
; 99.300 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.732      ;
; 99.300 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.732      ;
; 99.315 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.717      ;
; 99.322 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.710      ;
; 99.330 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.702      ;
; 99.331 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.701      ;
; 99.332 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.700      ;
; 99.333 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.699      ;
; 99.335 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.697      ;
; 99.350 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.682      ;
; 99.364 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.668      ;
; 99.365 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.667      ;
; 99.367 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.665      ;
; 99.370 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.662      ;
; 99.370 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.662      ;
; 99.405 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.627      ;
; 99.453 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.579      ;
; 99.498 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.534      ;
; 99.504 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.528      ;
; 99.505 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.527      ;
; 99.506 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.526      ;
; 99.508 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.524      ;
; 99.508 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.524      ;
; 99.509 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.523      ;
; 99.523 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.509      ;
; 99.569 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.463      ;
; 99.625 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.407      ;
; 99.625 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.407      ;
; 99.665 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 100.000      ; 0.000      ; 0.367      ;
+--------+----------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Hold: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'                                                                                                                                                                                                                                  ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                 ; To Node                                                                       ; Launch Clock                                        ; Latch Clock                                            ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; -1.012 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[23] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[23] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.339      ; 0.479      ;
; -0.918 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[1]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[1]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.334      ; 0.568      ;
; -0.916 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[3]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[3]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.334      ; 0.570      ;
; -0.912 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[4]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.334      ; 0.574      ;
; -0.912 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[0]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[0]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.334      ; 0.574      ;
; -0.867 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[21] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[21] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.328      ; 0.613      ;
; -0.861 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[19] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[19] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.328      ; 0.619      ;
; -0.853 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[22] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[22] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.328      ; 0.627      ;
; -0.841 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[18] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[18] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.323      ; 0.634      ;
; -0.804 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[10] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[10] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.328      ; 0.676      ;
; -0.804 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[9]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[9]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.328      ; 0.676      ;
; -0.783 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[20] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[20] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.328      ; 0.697      ;
; -0.727 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[7]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[7]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.328      ; 0.753      ;
; -0.711 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[8]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[8]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.328      ; 0.769      ;
; -0.707 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[12] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[12] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.323      ; 0.768      ;
; -0.698 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[5]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[5]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.343      ; 0.797      ;
; -0.684 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[11] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[11] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.323      ; 0.791      ;
; -0.678 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[6]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[6]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.343      ; 0.817      ;
; -0.651 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[13] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[13] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.314      ; 0.815      ;
; -0.586 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[16] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[16] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.336      ; 0.902      ;
; -0.584 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[15] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[15] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.336      ; 0.904      ;
; -0.584 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[14] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[14] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.336      ; 0.904      ;
; -0.555 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[2]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[2]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.356      ; 0.953      ;
; -0.508 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdl[17] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[17] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000        ; 1.336      ; 0.980      ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Hold: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'                                                                                                                                                                                                                                  ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; Slack  ; From Node                                                 ; To Node                                                                       ; Launch Clock                                        ; Latch Clock                                            ; Relationship ; Clock Skew ; Data Delay ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+
; -0.973 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[6]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[6]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.393      ; 0.572      ;
; -0.973 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[5]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[5]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.393      ; 0.572      ;
; -0.972 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[1]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[1]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.393      ; 0.573      ;
; -0.970 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[2]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[2]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.393      ; 0.575      ;
; -0.969 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[4]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.393      ; 0.576      ;
; -0.954 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[3]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[3]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.393      ; 0.591      ;
; -0.876 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[7]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[7]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.392      ; 0.668      ;
; -0.873 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[17] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[17] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.388      ; 0.667      ;
; -0.872 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[8]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[8]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.392      ; 0.672      ;
; -0.870 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[16] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[16] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.388      ; 0.670      ;
; -0.869 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[13] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[13] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.388      ; 0.671      ;
; -0.854 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[12] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[12] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.388      ; 0.686      ;
; -0.845 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[0]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[0]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.399      ; 0.706      ;
; -0.834 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[15] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[15] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.388      ; 0.706      ;
; -0.826 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[9]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[9]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.398      ; 0.724      ;
; -0.801 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[19] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[19] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.398      ; 0.749      ;
; -0.788 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[14] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[14] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.388      ; 0.752      ;
; -0.778 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[11] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[11] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.388      ; 0.762      ;
; -0.752 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[10] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[10] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.398      ; 0.798      ;
; -0.750 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[22] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[22] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.398      ; 0.800      ;
; -0.750 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[21] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[21] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.398      ; 0.800      ;
; -0.748 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[20] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[20] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.398      ; 0.802      ;
; -0.746 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[23] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[23] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.394      ; 0.800      ;
; -0.702 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|qdr[18] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[18] ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000        ; 1.388      ; 0.838      ;
+--------+-----------------------------------------------------------+-------------------------------------------------------------------------------+-----------------------------------------------------+--------------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Hold: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'                                                                                                                                                                                                                                            ;
+-------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+--------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                               ; To Node                                                                 ; Launch Clock                                           ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+--------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; 0.007 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.067      ; 0.367      ;
; 0.024 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr                  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.050      ; 0.367      ;
; 0.215 ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[1]                      ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[1]                      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[0]                      ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[0]                      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[1]                    ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[1]                    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[2]                    ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[2]                    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[3]                    ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[3]                    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[0]                    ; MMI:MMI_1|lcd_controller:lcd_controller_1|counter[0]                    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[2]                      ; MMI:MMI_1|lcd_controller:lcd_controller_1|index[2]                      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[0]                      ; MMI:MMI_1|lcd_controller:lcd_controller_1|delay[0]                      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[3]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|filter[3]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[6]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[6]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[2]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[2]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[4]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[4]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[7]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[7]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[5]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[5]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[3]                     ; MMI:MMI_1|mmi_controller:mmi_controller_1|f14_db[3]                     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[0]       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[0]       ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[0]      ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[0]      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[7]      ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[7]      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[7]       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[7]       ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[23]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[23]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[9]       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[9]       ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[8]       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[8]       ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[11]      ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[11]      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[10]      ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_left[10]      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[11]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[11]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[8]      ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[8]      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[9]      ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[9]      ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[10]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|counter_right[10]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[22]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[22]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[21]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[21]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[0] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[2] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[2] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[1] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[7] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[7] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[0] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[0] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[1] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[3] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[3] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[2] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|section[2] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[20]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[20]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[4] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[4] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[6] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[6] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[5] ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|counter[5] ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[54]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[54]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[56]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[56]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[60]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a1[60]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[54]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[54]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[58]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[58]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[59]     ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|a2[59]     ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[17]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[17]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[20]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[20]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[20]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[20]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[21]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[21]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[21]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[21]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[22]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[22]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[22]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[22]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[23]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_8[23]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[23]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_6[23]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[16]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_14[16]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[19]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[19]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[19]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[19]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[20]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[20]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[20]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[20]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[20]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[20]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[20]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[20]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[21]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[21]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[21]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[21]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[21]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[21]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[21]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[21]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[22]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[22]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[22]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[22]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[22]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[22]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[22]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[22]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[23]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_8[23]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[23]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y1_6[23]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[23]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_10[23]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[23]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x1_12[23]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_12[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_12[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_10[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|x2_10[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_5[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_5[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_7[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_7[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_14[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_14[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_13[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_13[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_4[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_4[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_3[18]   ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_3[18]   ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_12[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_12[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_11[18]  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|iir:filter|y2_11[18]  ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; 0.000        ; 0.000      ; 0.367      ;
+-------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+--------------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Hold: 'AUD_BCLK'                                                                                                                                                                                                                                                       ;
+-------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
; Slack ; From Node                                                                                        ; To Node                                                                                          ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
+-------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+
; 0.150 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[14]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.119      ; 0.421      ;
; 0.152 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[15]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.119      ; 0.423      ;
; 0.215 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enl                          ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enl                          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enr                          ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|enr                          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.367      ;
; 0.238 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[4]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[4]  ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.390      ;
; 0.240 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]                      ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.392      ;
; 0.240 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[13]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[14]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.392      ;
; 0.241 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.393      ;
; 0.245 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.397      ;
; 0.262 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.414      ;
; 0.266 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[5]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.079      ; 0.497      ;
; 0.266 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[6]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.079      ; 0.497      ;
; 0.266 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.119      ; 0.537      ;
; 0.270 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.119      ; 0.541      ;
; 0.271 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.119      ; 0.542      ;
; 0.286 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[1]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[2]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.438      ;
; 0.288 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[15]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[16]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.440      ;
; 0.288 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[4]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[5]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.440      ;
; 0.290 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[5]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[6]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.442      ;
; 0.291 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[17]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[18]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.443      ;
; 0.291 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[16]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[17]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.443      ;
; 0.294 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[18]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[19]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.446      ;
; 0.309 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[13]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[14]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.461      ;
; 0.316 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]                      ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[9]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.011      ; 0.479      ;
; 0.317 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]                      ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.469      ;
; 0.322 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[13]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[13]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; -0.001     ; 0.473      ;
; 0.328 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[4] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[4] ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.480      ;
; 0.332 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[15]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.484      ;
; 0.341 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[12]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; -0.001     ; 0.492      ;
; 0.343 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[11]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; -0.001     ; 0.494      ;
; 0.354 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[2]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[2]  ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.506      ;
; 0.356 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[3] ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.508      ;
; 0.356 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[1] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[1] ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.508      ;
; 0.357 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[3]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[4]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.509      ;
; 0.358 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[2]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[3]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.510      ;
; 0.359 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[21]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[22]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.511      ;
; 0.359 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[17]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[18]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.511      ;
; 0.359 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[9]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[10]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.511      ;
; 0.359 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[8]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[9]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.511      ;
; 0.359 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[6]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[7]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.511      ;
; 0.359 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[4]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[5]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.511      ;
; 0.360 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[8]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[9]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.512      ;
; 0.360 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[1]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[2]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.512      ;
; 0.361 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[0]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[0]             ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.513      ;
; 0.361 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2]             ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.513      ;
; 0.361 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[20]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[21]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.513      ;
; 0.361 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[12]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[13]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.513      ;
; 0.362 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[23]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.113      ; 0.627      ;
; 0.362 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[12]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[13]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.514      ;
; 0.362 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[10]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[11]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.514      ;
; 0.362 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[3]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[4]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.514      ;
; 0.363 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[2]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.113      ; 0.628      ;
; 0.363 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[5]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.113      ; 0.628      ;
; 0.363 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[16]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[17]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.515      ;
; 0.364 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[0]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.113      ; 0.629      ;
; 0.364 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[11]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[12]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.010      ; 0.526      ;
; 0.365 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[18]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[19]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.517      ;
; 0.365 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[9]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[10]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.517      ;
; 0.366 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[1]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.113      ; 0.631      ;
; 0.366 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[4]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.113      ; 0.631      ;
; 0.366 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[3]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[3]  ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.518      ;
; 0.366 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[2] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[2] ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.518      ;
; 0.367 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[14]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[15]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.519      ;
; 0.367 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_right[0] ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.519      ;
; 0.367 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[20]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[21]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.519      ;
; 0.367 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[1]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[1]  ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.519      ;
; 0.367 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[0]  ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:counter_left[0]  ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.519      ;
; 0.368 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[3]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.113      ; 0.633      ;
; 0.369 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1]             ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.521      ;
; 0.369 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.521      ;
; 0.369 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[12]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[13]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.521      ;
; 0.369 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[10]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[11]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.521      ;
; 0.369 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[6]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[7]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.521      ;
; 0.370 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[22]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[23]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.522      ;
; 0.370 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[21]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[22]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.522      ;
; 0.370 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[15]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[16]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.522      ;
; 0.370 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[14]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[15]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.522      ;
; 0.370 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[5]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[6]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.522      ;
; 0.371 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[2]           ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[3]           ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.523      ;
; 0.372 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[14]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdr[15]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.524      ;
; 0.375 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.527      ;
; 0.376 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[7]                      ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.528      ;
; 0.377 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[0]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[0]              ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.529      ;
; 0.377 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[2]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[2]              ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.529      ;
; 0.377 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[12]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.529      ;
; 0.378 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.530      ;
; 0.378 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[9]                      ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[10]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.530      ;
; 0.379 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[10]                     ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]                     ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.015      ; 0.546      ;
; 0.379 ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[22]          ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|\transmit:sdl[23]          ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.531      ;
; 0.380 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]              ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.532      ;
; 0.382 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[6]                      ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[7]                      ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.000      ; 0.534      ;
; 0.383 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[6]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.079      ; 0.614      ;
; 0.385 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]              ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[5]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.079      ; 0.616      ;
; 0.388 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3]             ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[14]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.109      ; 0.649      ;
; 0.416 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]                      ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[6]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.014      ; 0.582      ;
; 0.416 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[6]                      ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[7]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.014      ; 0.582      ;
; 0.416 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]                      ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[9]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.014      ; 0.582      ;
; 0.417 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]                      ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[8]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.014      ; 0.583      ;
; 0.419 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[9]                      ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dr[10]                       ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.014      ; 0.585      ;
; 0.427 ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]                      ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[1]                        ; AUD_BCLK     ; AUD_BCLK    ; 0.000        ; 0.005      ; 0.584      ;
+-------+--------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------+--------------+-------------+--------------+------------+------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Hold: 'CLOCK_27'                                                                                                                                                             ;
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
; Slack ; From Node                                           ; To Node                                             ; Launch Clock ; Latch Clock ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+
; 0.215 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.367      ;
; 0.522 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.674      ;
; 0.526 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.678      ;
; 0.536 ; clock_generator:clock_generator_1|start_counter[25] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.688      ;
; 0.578 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.730      ;
; 0.578 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.730      ;
; 0.654 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.806      ;
; 0.661 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.813      ;
; 0.666 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.818      ;
; 0.702 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.854      ;
; 0.739 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.891      ;
; 0.747 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.899      ;
; 0.748 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[17] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.900      ;
; 0.752 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.904      ;
; 0.758 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.910      ;
; 0.770 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.922      ;
; 0.773 ; clock_generator:clock_generator_1|start_counter[4]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.925      ;
; 0.791 ; clock_generator:clock_generator_1|start_counter[24] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.943      ;
; 0.791 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 0.945      ;
; 0.799 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.951      ;
; 0.799 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.951      ;
; 0.799 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.951      ;
; 0.804 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 0.958      ;
; 0.823 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.975      ;
; 0.827 ; clock_generator:clock_generator_1|start_counter[23] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.979      ;
; 0.828 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.980      ;
; 0.828 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.980      ;
; 0.833 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 0.987      ;
; 0.834 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.986      ;
; 0.839 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.991      ;
; 0.839 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.991      ;
; 0.839 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 0.991      ;
; 0.857 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.009      ;
; 0.872 ; clock_generator:clock_generator_1|start_counter[18] ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.024      ;
; 0.873 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.027      ;
; 0.880 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.034      ;
; 0.880 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.034      ;
; 0.885 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.039      ;
; 0.887 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.041      ;
; 0.887 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[17] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.039      ;
; 0.888 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.040      ;
; 0.888 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.040      ;
; 0.893 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.045      ;
; 0.893 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.045      ;
; 0.900 ; clock_generator:clock_generator_1|start_counter[3]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.054      ;
; 0.903 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.057      ;
; 0.904 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.056      ;
; 0.904 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.056      ;
; 0.909 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.061      ;
; 0.909 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.063      ;
; 0.914 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.068      ;
; 0.915 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[16] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.067      ;
; 0.916 ; clock_generator:clock_generator_1|start_counter[15] ; clock_generator:clock_generator_1|start_counter[15] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.068      ;
; 0.919 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.071      ;
; 0.920 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.072      ;
; 0.920 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.074      ;
; 0.920 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|start_counter[4]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.074      ;
; 0.921 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[13] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.073      ;
; 0.921 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[14] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.073      ;
; 0.924 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.004     ; 1.072      ;
; 0.924 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.076      ;
; 0.926 ; clock_generator:clock_generator_1|start_counter[15] ; clock_generator:clock_generator_1|start_counter[17] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.078      ;
; 0.928 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[24] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.082      ;
; 0.929 ; clock_generator:clock_generator_1|start_counter[13] ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.081      ;
; 0.929 ; clock_generator:clock_generator_1|start_counter[2]  ; clock_generator:clock_generator_1|start_counter[5]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.083      ;
; 0.933 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.087      ;
; 0.934 ; clock_generator:clock_generator_1|start_counter[13] ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.086      ;
; 0.934 ; clock_generator:clock_generator_1|start_counter[13] ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.086      ;
; 0.934 ; clock_generator:clock_generator_1|start_counter[13] ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.086      ;
; 0.935 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[21] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.087      ;
; 0.938 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.092      ;
; 0.938 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.092      ;
; 0.938 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.092      ;
; 0.944 ; clock_generator:clock_generator_1|start_counter[21] ; clock_generator:clock_generator_1|start_counter[22] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.096      ;
; 0.947 ; clock_generator:clock_generator_1|start_counter[17] ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.099      ;
; 0.950 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[13] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.102      ;
; 0.950 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[14] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.102      ;
; 0.952 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.106      ;
; 0.954 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.108      ;
; 0.956 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|reset             ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.108      ;
; 0.956 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.108      ;
; 0.957 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[25] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.111      ;
; 0.957 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.111      ;
; 0.957 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.111      ;
; 0.957 ; clock_generator:clock_generator_1|start_counter[22] ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.111      ;
; 0.961 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|start_counter[13] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.113      ;
; 0.961 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|start_counter[14] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.113      ;
; 0.961 ; clock_generator:clock_generator_1|start_counter[5]  ; clock_generator:clock_generator_1|start_counter[7]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.004     ; 1.109      ;
; 0.963 ; clock_generator:clock_generator_1|start_counter[15] ; clock_generator:clock_generator_1|start_counter[18] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.115      ;
; 0.979 ; clock_generator:clock_generator_1|start_counter[0]  ; clock_generator:clock_generator_1|start_counter[6]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.133      ;
; 0.983 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[20] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.135      ;
; 0.985 ; clock_generator:clock_generator_1|start_counter[1]  ; clock_generator:clock_generator_1|reset             ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.137      ;
; 0.995 ; clock_generator:clock_generator_1|start_counter[15] ; clock_generator:clock_generator_1|start_counter[19] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.147      ;
; 0.996 ; clock_generator:clock_generator_1|start_counter[14] ; clock_generator:clock_generator_1|reset             ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.000      ; 1.148      ;
; 0.999 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 1.149      ;
; 0.999 ; clock_generator:clock_generator_1|start_counter[20] ; clock_generator:clock_generator_1|start_counter[23] ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.153      ;
; 1.002 ; clock_generator:clock_generator_1|start_counter[16] ; clock_generator:clock_generator_1|start_counter[0]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; 0.002      ; 1.156      ;
; 1.004 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[2]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 1.154      ;
; 1.004 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[1]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 1.154      ;
; 1.004 ; clock_generator:clock_generator_1|start_counter[6]  ; clock_generator:clock_generator_1|start_counter[3]  ; CLOCK_27     ; CLOCK_27    ; 0.000        ; -0.002     ; 1.154      ;
+-------+-----------------------------------------------------+-----------------------------------------------------+--------------+-------------+--------------+------------+------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Hold: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'                                                                                                                                                                                                                                               ;
+-------+----------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                  ; To Node                                                                    ; Launch Clock                                        ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+-------+----------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; 0.215 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.255 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.407      ;
; 0.255 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.407      ;
; 0.311 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.463      ;
; 0.357 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.509      ;
; 0.371 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.523      ;
; 0.372 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.524      ;
; 0.372 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.524      ;
; 0.374 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.526      ;
; 0.375 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.527      ;
; 0.376 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.528      ;
; 0.382 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.534      ;
; 0.384 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.536      ;
; 0.427 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.579      ;
; 0.475 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.627      ;
; 0.510 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.662      ;
; 0.510 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.662      ;
; 0.513 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.665      ;
; 0.515 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.667      ;
; 0.516 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.668      ;
; 0.530 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.682      ;
; 0.545 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.697      ;
; 0.547 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.699      ;
; 0.548 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.700      ;
; 0.549 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.701      ;
; 0.550 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.702      ;
; 0.558 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.710      ;
; 0.565 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.717      ;
; 0.580 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.732      ;
; 0.580 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.732      ;
; 0.582 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.734      ;
; 0.583 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.735      ;
; 0.597 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.749      ;
; 0.600 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.752      ;
; 0.610 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.762      ;
; 0.615 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.767      ;
; 0.617 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.769      ;
; 0.618 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.770      ;
; 0.622 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.774      ;
; 0.635 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.787      ;
; 0.644 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.796      ;
; 0.650 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.802      ;
; 0.652 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.804      ;
; 0.670 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.822      ;
; 0.670 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.822      ;
; 0.674 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.826      ;
; 0.680 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.832      ;
; 0.685 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.837      ;
; 0.705 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.857      ;
; 0.712 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.864      ;
; 0.723 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.875      ;
; 0.746 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.898      ;
; 0.753 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.905      ;
; 0.756 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.908      ;
; 0.779 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.931      ;
; 0.787 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.939      ;
; 0.799 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.951      ;
; 0.845 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.997      ;
; 0.850 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.002      ;
; 0.858 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.010      ;
; 0.909 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.061      ;
; 0.918 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.070      ;
; 0.980 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.132      ;
; 0.982 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.134      ;
; 1.045 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.197      ;
; 1.053 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 1.205      ;
+-------+----------------------------------------------------------------------------+----------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Hold: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                                                                                                                                              ;
+-------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                                                                  ; To Node                                                                   ; Launch Clock                                        ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+-------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende            ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.215 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.367      ;
; 0.240 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.392      ;
; 0.246 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.398      ;
; 0.267 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.419      ;
; 0.270 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.422      ;
; 0.273 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.425      ;
; 0.288 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.440      ;
; 0.309 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.461      ;
; 0.318 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.470      ;
; 0.323 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.002      ; 0.477      ;
; 0.357 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.002     ; 0.507      ;
; 0.362 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.002      ; 0.516      ;
; 0.363 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.515      ;
; 0.369 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.521      ;
; 0.372 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.524      ;
; 0.379 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.531      ;
; 0.379 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.531      ;
; 0.388 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.540      ;
; 0.398 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.550      ;
; 0.408 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.002      ; 0.562      ;
; 0.414 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.566      ;
; 0.422 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.574      ;
; 0.434 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.586      ;
; 0.467 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.009      ; 0.628      ;
; 0.467 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.619      ;
; 0.468 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.620      ;
; 0.473 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.625      ;
; 0.479 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.002     ; 0.629      ;
; 0.481 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.002     ; 0.631      ;
; 0.486 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.002     ; 0.636      ;
; 0.489 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.641      ;
; 0.494 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.646      ;
; 0.498 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.650      ;
; 0.499 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.006      ; 0.657      ;
; 0.501 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.008     ; 0.645      ;
; 0.535 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.002      ; 0.689      ;
; 0.536 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende            ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.688      ;
; 0.537 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten     ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.009     ; 0.680      ;
; 0.540 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.002      ; 0.694      ;
; 0.547 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.005      ; 0.704      ;
; 0.552 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.704      ;
; 0.558 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.710      ;
; 0.562 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.006     ; 0.708      ;
; 0.578 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.730      ;
; 0.583 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung   ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.735      ;
; 0.594 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.746      ;
; 0.605 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.038     ; 0.719      ;
; 0.610 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.047     ; 0.715      ;
; 0.611 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.008     ; 0.755      ;
; 0.614 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.766      ;
; 0.615 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.008     ; 0.759      ;
; 0.615 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.002      ; 0.769      ;
; 0.619 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.771      ;
; 0.621 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.008     ; 0.765      ;
; 0.628 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten      ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.780      ;
; 0.634 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.047     ; 0.739      ;
; 0.636 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.047     ; 0.741      ;
; 0.637 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.047     ; 0.742      ;
; 0.639 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.047     ; 0.744      ;
; 0.657 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.809      ;
; 0.662 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.814      ;
; 0.667 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand  ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.011      ; 0.830      ;
; 0.678 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.830      ;
; 0.701 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.004      ; 0.857      ;
; 0.701 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.008      ; 0.861      ;
; 0.722 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.042     ; 0.832      ;
; 0.734 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.002     ; 0.884      ;
; 0.739 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]              ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.891      ;
; 0.741 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.000      ; 0.893      ;
; 0.753 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.002     ; 0.903      ;
; 0.760 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.036     ; 0.876      ;
; 0.774 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.047     ; 0.879      ;
; 0.774 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.047     ; 0.879      ;
; 0.774 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.047     ; 0.879      ;
; 0.777 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.002     ; 0.927      ;
; 0.778 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.008      ; 0.938      ;
; 0.779 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.006      ; 0.937      ;
; 0.794 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende        ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.011     ; 0.935      ;
; 0.800 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n           ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.009     ; 0.943      ;
; 0.803 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.006      ; 0.961      ;
; 0.824 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.044     ; 0.932      ;
; 0.824 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.044     ; 0.932      ;
; 0.844 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.002     ; 0.994      ;
; 0.845 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack             ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.004     ; 0.993      ;
; 0.849 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.004      ; 1.005      ;
; 0.868 ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                    ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; 0.006      ; 1.026      ;
; 0.873 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.038     ; 0.987      ;
; 0.873 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.038     ; 0.987      ;
; 0.873 ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 0.000        ; -0.038     ; 0.987      ;
+-------+----------------------------------------------------------------------------+---------------------------------------------------------------------------+-----------------------------------------------------+-----------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Recovery: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                                                                ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                               ; To Node                                                                   ; Launch Clock ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; 5.507 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.638     ; 2.146      ;
; 5.507 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.638     ; 2.146      ;
; 5.507 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.638     ; 2.146      ;
; 5.507 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.638     ; 2.146      ;
; 5.507 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.638     ; 2.146      ;
; 5.507 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.638     ; 2.146      ;
; 5.507 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.638     ; 2.146      ;
; 5.507 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.638     ; 2.146      ;
; 5.615 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.629     ; 2.047      ;
; 5.615 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.629     ; 2.047      ;
; 5.615 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.629     ; 2.047      ;
; 5.615 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.629     ; 2.047      ;
; 5.615 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.629     ; 2.047      ;
; 5.615 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.629     ; 2.047      ;
; 5.615 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.629     ; 2.047      ;
; 5.615 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.629     ; 2.047      ;
; 5.615 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.629     ; 2.047      ;
; 5.618 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 9.259        ; -1.627     ; 2.046      ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Removal: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                                                                 ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; Slack ; From Node                               ; To Node                                                                   ; Launch Clock ; Latch Clock                                         ; Relationship ; Clock Skew ; Data Delay ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+
; 3.522 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.627     ; 2.046      ;
; 3.525 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.629     ; 2.047      ;
; 3.525 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.629     ; 2.047      ;
; 3.525 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.629     ; 2.047      ;
; 3.525 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.629     ; 2.047      ;
; 3.525 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.629     ; 2.047      ;
; 3.525 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.629     ; 2.047      ;
; 3.525 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.629     ; 2.047      ;
; 3.525 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.629     ; 2.047      ;
; 3.525 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.629     ; 2.047      ;
; 3.633 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.638     ; 2.146      ;
; 3.633 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.638     ; 2.146      ;
; 3.633 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.638     ; 2.146      ;
; 3.633 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.638     ; 2.146      ;
; 3.633 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.638     ; 2.146      ;
; 3.633 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.638     ; 2.146      ;
; 3.633 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.638     ; 2.146      ;
; 3.633 ; clock_generator:clock_generator_1|reset ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ; CLOCK_27     ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; -0.001       ; -1.638     ; 2.146      ;
+-------+-----------------------------------------+---------------------------------------------------------------------------+--------------+-----------------------------------------------------+--------------+------------+------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width: 'AUD_BCLK'                                                                                                                               ;
+--------+--------------+----------------+------------------+----------+------------+--------------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                                               ;
+--------+--------------+----------------+------------------+----------+------------+--------------------------------------------------------------------------------------+
; -1.222 ; 1.000        ; 2.222          ; Port Rate        ; AUD_BCLK ; Rise       ; AUD_BCLK                                                                             ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[0]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[0]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[1]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[2]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[2]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[3]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_left[4]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[0] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[0] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[1] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[2] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[3] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|counter_right[4] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[0]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[10]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[10]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[11]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[12]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[12]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[13]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[13]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[14]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[14]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[15]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[15]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[16]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[17]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[18]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[19]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[1]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[20]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[21]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[22]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]         ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[23]         ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[2]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[3]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[4]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[5]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[6]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[6]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[7]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[7]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[8]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[9]          ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|data[9]          ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[0]            ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[0]            ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[10]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[10]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[11]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[11]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[12]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[12]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[13]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[13]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[14]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[14]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[15]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[15]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[16]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[16]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[17]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[17]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[18]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[18]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[19]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[19]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[1]            ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[1]            ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[20]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[20]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[21]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[21]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[22]           ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[22]           ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; AUD_BCLK ; Rise       ; audio_unit:audio_unit_1|audio_input_register:audio_input_register_1|dl[23]           ;
+--------+--------------+----------------+------------------+----------+------------+--------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql'                                                                                                                        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                  ; Clock Edge ; Target                                                                        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[0]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[0]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[10] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[10] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[11] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[11] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[12] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[12] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[13] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[13] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[14] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[14] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[15] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[15] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[16] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[16] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[17] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[17] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[18] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[18] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[19] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[19] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[1]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[1]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[20] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[20] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[21] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[21] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[22] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[22] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[23] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[23] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[2]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[2]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[3]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[3]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[4]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[4]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[5]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[5]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[6]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[6]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[7]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[7]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[8]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[8]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[9]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idl[9]  ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[0]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[0]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[10]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[10]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[11]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[11]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[12]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[12]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[13]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[13]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[14]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[14]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[15]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[15]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[16]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[16]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[17]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[17]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[18]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[18]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[19]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[19]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[1]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[1]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[20]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[20]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[21]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[21]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[22]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[22]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[23]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[23]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[2]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[2]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[3]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[3]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[4]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[4]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[5]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[5]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[6]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[6]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[7]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[7]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[8]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[8]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[9]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|audio_output_register_1|idl[9]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|filter_unit_1|enql|regout                                        ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|filter_unit_1|enql|regout                                        ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|filter_unit_1|enql~clkctrl|inclk[0]                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; Rise       ; audio_unit_1|filter_unit_1|enql~clkctrl|inclk[0]                              ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width: 'audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr'                                                                                                                        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                                  ; Clock Edge ; Target                                                                        ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[0]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[0]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[10] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[10] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[11] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[11] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[12] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[12] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[13] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[13] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[14] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[14] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[15] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[15] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[16] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[16] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[17] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[17] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[18] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[18] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[19] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[19] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[1]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[1]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[20] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[20] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[21] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[21] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[22] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[22] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[23] ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[23] ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[2]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[2]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[3]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[3]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[4]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[4]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[5]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[5]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[6]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[6]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[7]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[7]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[8]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[8]  ;
; -0.500 ; 0.500        ; 1.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[9]  ;
; -0.500 ; 0.500        ; 1.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit:audio_unit_1|audio_output_register:audio_output_register_1|idr[9]  ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[0]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[0]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[10]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[10]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[11]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[11]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[12]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[12]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[13]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[13]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[14]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[14]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[15]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[15]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[16]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[16]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[17]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[17]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[18]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[18]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[19]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[19]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[1]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[1]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[20]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[20]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[21]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[21]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[22]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[22]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[23]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[23]|clk                              ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[2]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[2]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[3]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[3]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[4]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[4]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[5]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[5]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[6]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[6]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[7]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[7]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[8]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[8]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[9]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|audio_output_register_1|idr[9]|clk                               ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|filter_unit_1|enqr|regout                                        ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|filter_unit_1|enqr|regout                                        ;
; 0.500  ; 0.500        ; 0.000          ; High Pulse Width ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|filter_unit_1|enqr~clkctrl|inclk[0]                              ;
; 0.500  ; 0.500        ; 0.000          ; Low Pulse Width  ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; Rise       ; audio_unit_1|filter_unit_1|enqr~clkctrl|inclk[0]                              ;
+--------+--------------+----------------+------------------+--------------------------------------------------------+------------+-------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width: 'clock_generator_1|pll_1|altpll_component|pll|clk[0]'                                                                                                                                                                ;
+-------+--------------+----------------+------------------+-----------------------------------------------------+------------+------------------------------------------------------------------------------------------------------------------------+
; Slack ; Actual Width ; Required Width ; Type             ; Clock                                               ; Clock Edge ; Target                                                                                                                 ;
+-------+--------------+----------------+------------------+-----------------------------------------------------+------------+------------------------------------------------------------------------------------------------------------------------+
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[18]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[19]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[20]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[21]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[22]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[23]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[24]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[25]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[26]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[27]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[28]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_2 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[29]~_Duplicate_3 ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[30]              ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[30]              ;
; 7.981 ; 10.000       ; 2.019          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[30]~_Duplicate_1 ;
; 7.981 ; 10.000       ; 2.019          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ; Rise       ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|coefficients_register:coefficients_register_1|mul_b[30]~_Duplicate_1 ;
+-------+--------------+----------------+------------------+-----------------------------------------------------+------------+------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width: 'CLOCK_50'                                                                                                ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+
; 10.000 ; 10.000       ; 0.000          ; High Pulse Width ; CLOCK_50 ; Rise       ; CLOCK_50|combout                                      ;
; 10.000 ; 10.000       ; 0.000          ; Low Pulse Width  ; CLOCK_50 ; Rise       ; CLOCK_50|combout                                      ;
; 10.000 ; 10.000       ; 0.000          ; High Pulse Width ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0]   ;
; 10.000 ; 10.000       ; 0.000          ; Low Pulse Width  ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0]   ;
; 10.000 ; 10.000       ; 0.000          ; High Pulse Width ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[1]   ;
; 10.000 ; 10.000       ; 0.000          ; Low Pulse Width  ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[1]   ;
; 10.000 ; 10.000       ; 0.000          ; High Pulse Width ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|inclk[0] ;
; 10.000 ; 10.000       ; 0.000          ; Low Pulse Width  ; CLOCK_50 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|inclk[0] ;
; 17.620 ; 20.000       ; 2.380          ; Port Rate        ; CLOCK_50 ; Rise       ; CLOCK_50                                              ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width: 'CLOCK_27'                                                                                                ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock    ; Clock Edge ; Target                                                ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|reset               ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[0]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[10]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[11]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[12]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[13]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[14]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[15]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[16]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[17]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[18]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[19]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[1]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[20]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[21]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[22]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[23]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[24]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[25]   ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[2]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[3]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[4]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[5]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[6]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[7]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[8]    ;
; 17.518 ; 18.518       ; 1.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[9]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|reset               ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[0]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[10]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[11]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[12]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[13]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[14]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[15]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[16]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[17]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[18]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[19]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[1]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[20]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[21]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[22]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[23]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[24]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[25]   ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[2]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[3]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[4]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[5]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[6]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[7]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[8]    ;
; 17.519 ; 18.519       ; 1.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator:clock_generator_1|start_counter[9]    ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; CLOCK_27|combout                                      ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; CLOCK_27~clkctrl|inclk[0]                             ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; CLOCK_27~clkctrl|outclk                               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1]   ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|inclk[0] ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|reset|clk                           ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[0]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[10]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[11]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[12]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[13]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[14]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[15]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[16]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[17]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[18]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[19]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[1]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[20]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[21]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[22]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[23]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[24]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[25]|clk               ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[2]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[3]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[4]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[5]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[6]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[7]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[8]|clk                ;
; 18.518 ; 18.518       ; 0.000          ; High Pulse Width ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[9]|clk                ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; CLOCK_27|combout                                      ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; CLOCK_27~clkctrl|inclk[0]                             ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; CLOCK_27~clkctrl|outclk                               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1]   ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|inclk[0] ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|reset|clk                           ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[0]|clk                ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[10]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[11]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[12]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[13]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[14]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[15]|clk               ;
; 18.519 ; 18.519       ; 0.000          ; Low Pulse Width  ; CLOCK_27 ; Rise       ; clock_generator_1|start_counter[16]|clk               ;
+--------+--------------+----------------+------------------+----------+------------+-------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width: 'clock_generator_1|pll_2|altpll_component|pll|clk[1]'                                                                                                                    ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+---------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                               ; Clock Edge ; Target                                                                    ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+---------------------------------------------------------------------------+
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ;
; 40.666 ; 41.666       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[0]             ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[1]             ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[2]             ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Befehls_NR[3]             ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[0]                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[1]                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[2]                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Byte[3]                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SCLK                      ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~en                   ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|SDIN~reg0                 ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[0]                ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|Sektion[1]                ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack            ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten     ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ack_warten2    ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.anfangszustand ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.bit_n          ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.ende           ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.error          ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.startbedingung ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stop_warten    ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.stopbedingung  ;
; 40.667 ; 41.667       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit:audio_unit_1|i2c_master:i2c_master_1|reg_fstate.taktende       ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[0]|clk                               ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[1]|clk                               ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[2]|clk                               ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[3]|clk                               ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[0]|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[1]|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[2]|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[3]|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SCLK|clk                                        ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SDIN~en|clk                                     ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SDIN~reg0|clk                                   ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Sektion[0]|clk                                  ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Sektion[1]|clk                                  ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack_warten2|clk                      ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack_warten|clk                       ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack|clk                              ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.anfangszustand|clk                   ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.bit_n|clk                            ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ende|clk                             ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.error|clk                            ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.startbedingung|clk                   ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.stop_warten|clk                      ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.stopbedingung|clk                    ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.taktende|clk                         ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_2|altpll_component|_clk1~clkctrl|inclk[0]           ;
; 41.666 ; 41.666       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_2|altpll_component|_clk1~clkctrl|outclk             ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[0]|clk                               ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[1]|clk                               ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[2]|clk                               ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Befehls_NR[3]|clk                               ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[0]|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[1]|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[2]|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Byte[3]|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SCLK|clk                                        ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SDIN~en|clk                                     ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|SDIN~reg0|clk                                   ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Sektion[0]|clk                                  ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|Sektion[1]|clk                                  ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack_warten2|clk                      ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack_warten|clk                       ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ack|clk                              ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.anfangszustand|clk                   ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.bit_n|clk                            ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.ende|clk                             ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.error|clk                            ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.startbedingung|clk                   ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.stop_warten|clk                      ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.stopbedingung|clk                    ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; audio_unit_1|i2c_master_1|reg_fstate.taktende|clk                         ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_2|altpll_component|_clk1~clkctrl|inclk[0]           ;
; 41.667 ; 41.667       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_2|altpll_component|_clk1~clkctrl|outclk             ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+---------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Model Minimum Pulse Width: 'clock_generator_1|pll_1|altpll_component|pll|clk[1]'                                                                                                                     ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------+
; Slack  ; Actual Width ; Required Width ; Type             ; Clock                                               ; Clock Edge ; Target                                                                     ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------+
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[0]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[1]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[2]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[3]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[4]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[5]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[6]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[7]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|c400[8]    ;
; 49.000 ; 50.000       ; 1.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ;
; 49.000 ; 50.000       ; 1.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator:clock_generator_1|clock_divider:clock_divider_1|clk_400kHz ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[0]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[0]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[1]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[1]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[2]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[2]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[3]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[3]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[4]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[4]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[5]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[5]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[6]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[6]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[7]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[7]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[8]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|c400[8]|clk                              ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|clk_400kHz|clk                           ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|clock_divider_1|clk_400kHz|clk                           ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_1|altpll_component|_clk1~clkctrl|inclk[0]            ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_1|altpll_component|_clk1~clkctrl|inclk[0]            ;
; 50.000 ; 50.000       ; 0.000          ; High Pulse Width ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_1|altpll_component|_clk1~clkctrl|outclk              ;
; 50.000 ; 50.000       ; 0.000          ; Low Pulse Width  ; clock_generator_1|pll_1|altpll_component|pll|clk[1] ; Rise       ; clock_generator_1|pll_1|altpll_component|_clk1~clkctrl|outclk              ;
+--------+--------------+----------------+------------------+-----------------------------------------------------+------------+----------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                 ;
+-------------+------------+-------+-------+------------+-----------------------------------------------------+
; Data Port   ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                     ;
+-------------+------------+-------+-------+------------+-----------------------------------------------------+
; AUD_ADCDAT  ; AUD_BCLK   ; 2.243 ; 2.243 ; Rise       ; AUD_BCLK                                            ;
; AUD_ADCLRCK ; AUD_BCLK   ; 3.221 ; 3.221 ; Rise       ; AUD_BCLK                                            ;
; AUD_DACLRCK ; AUD_BCLK   ; 2.867 ; 2.867 ; Fall       ; AUD_BCLK                                            ;
; SW[*]       ; CLOCK_27   ; 2.918 ; 2.918 ; Rise       ; CLOCK_27                                            ;
;  SW[17]     ; CLOCK_27   ; 2.918 ; 2.918 ; Rise       ; CLOCK_27                                            ;
; KEY[*]      ; CLOCK_50   ; 6.007 ; 6.007 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[0]     ; CLOCK_50   ; 5.729 ; 5.729 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[1]     ; CLOCK_50   ; 6.007 ; 6.007 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[2]     ; CLOCK_50   ; 5.070 ; 5.070 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[3]     ; CLOCK_50   ; 5.197 ; 5.197 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; 2.696 ; 2.696 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[2]      ; CLOCK_50   ; 2.132 ; 2.132 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[3]      ; CLOCK_50   ; 2.696 ; 2.696 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; 2.275 ; 2.275 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[1]      ; CLOCK_50   ; 2.275 ; 2.275 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; I2C_SDAT    ; CLOCK_27   ; 4.320 ; 4.320 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-------------+------------+-------+-------+------------+-----------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                    ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; Data Port   ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                     ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; AUD_ADCDAT  ; AUD_BCLK   ; -1.877 ; -1.877 ; Rise       ; AUD_BCLK                                            ;
; AUD_ADCLRCK ; AUD_BCLK   ; -2.147 ; -2.147 ; Rise       ; AUD_BCLK                                            ;
; AUD_DACLRCK ; AUD_BCLK   ; -1.889 ; -1.889 ; Fall       ; AUD_BCLK                                            ;
; SW[*]       ; CLOCK_27   ; -2.489 ; -2.489 ; Rise       ; CLOCK_27                                            ;
;  SW[17]     ; CLOCK_27   ; -2.489 ; -2.489 ; Rise       ; CLOCK_27                                            ;
; KEY[*]      ; CLOCK_50   ; -3.920 ; -3.920 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[0]     ; CLOCK_50   ; -4.166 ; -4.166 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[1]     ; CLOCK_50   ; -4.027 ; -4.027 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[2]     ; CLOCK_50   ; -3.920 ; -3.920 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[3]     ; CLOCK_50   ; -4.149 ; -4.149 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; -1.274 ; -1.274 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[2]      ; CLOCK_50   ; -1.274 ; -1.274 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[3]      ; CLOCK_50   ; -1.302 ; -1.302 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; -1.230 ; -1.230 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[1]      ; CLOCK_50   ; -1.230 ; -1.230 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; I2C_SDAT    ; CLOCK_27   ; -3.845 ; -3.845 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                        ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                     ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; AUD_DACDAT   ; AUD_BCLK   ; 3.794 ; 3.794 ; Fall       ; AUD_BCLK                                            ;
; LCD_DATA[*]  ; CLOCK_50   ; 3.571 ; 3.571 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[0] ; CLOCK_50   ; 2.997 ; 2.997 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[1] ; CLOCK_50   ; 3.113 ; 3.113 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[2] ; CLOCK_50   ; 3.285 ; 3.285 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[3] ; CLOCK_50   ; 2.946 ; 2.946 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[4] ; CLOCK_50   ; 3.571 ; 3.571 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[5] ; CLOCK_50   ; 2.871 ; 2.871 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[6] ; CLOCK_50   ; 3.422 ; 3.422 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[7] ; CLOCK_50   ; 3.108 ; 3.108 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_EN       ; CLOCK_50   ; 3.750 ; 3.750 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_RS       ; CLOCK_50   ; 2.779 ; 2.779 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX0[*]      ; CLOCK_50   ; 3.309 ; 3.309 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[2]     ; CLOCK_50   ; 3.019 ; 3.019 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[3]     ; CLOCK_50   ; 3.309 ; 3.309 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[4]     ; CLOCK_50   ; 3.122 ; 3.122 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[5]     ; CLOCK_50   ; 3.015 ; 3.015 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[6]     ; CLOCK_50   ; 2.957 ; 2.957 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX1[*]      ; CLOCK_50   ; 3.464 ; 3.464 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[1]     ; CLOCK_50   ; 2.876 ; 2.876 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[2]     ; CLOCK_50   ; 2.775 ; 2.775 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[3]     ; CLOCK_50   ; 3.456 ; 3.456 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[4]     ; CLOCK_50   ; 3.117 ; 3.117 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[6]     ; CLOCK_50   ; 3.464 ; 3.464 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX2[*]      ; CLOCK_50   ; 2.670 ; 2.670 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[0]     ; CLOCK_50   ; 2.646 ; 2.646 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[1]     ; CLOCK_50   ; 2.617 ; 2.617 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[2]     ; CLOCK_50   ; 2.670 ; 2.670 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[3]     ; CLOCK_50   ; 2.662 ; 2.662 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[4]     ; CLOCK_50   ; 2.392 ; 2.392 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[5]     ; CLOCK_50   ; 2.657 ; 2.657 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[6]     ; CLOCK_50   ; 2.637 ; 2.637 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX3[*]      ; CLOCK_50   ; 2.716 ; 2.716 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[0]     ; CLOCK_50   ; 2.716 ; 2.716 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[1]     ; CLOCK_50   ; 2.673 ; 2.673 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[2]     ; CLOCK_50   ; 2.501 ; 2.501 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[3]     ; CLOCK_50   ; 2.522 ; 2.522 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[4]     ; CLOCK_50   ; 2.481 ; 2.481 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[5]     ; CLOCK_50   ; 2.509 ; 2.509 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[6]     ; CLOCK_50   ; 2.467 ; 2.467 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX4[*]      ; CLOCK_50   ; 2.947 ; 2.947 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX4[6]     ; CLOCK_50   ; 2.947 ; 2.947 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX6[*]      ; CLOCK_50   ; 2.856 ; 2.856 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[0]     ; CLOCK_50   ; 2.493 ; 2.493 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[1]     ; CLOCK_50   ; 2.465 ; 2.465 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[2]     ; CLOCK_50   ; 2.202 ; 2.202 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[3]     ; CLOCK_50   ; 2.565 ; 2.565 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[4]     ; CLOCK_50   ; 2.783 ; 2.783 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[5]     ; CLOCK_50   ; 2.856 ; 2.856 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[6]     ; CLOCK_50   ; 2.601 ; 2.601 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX7[*]      ; CLOCK_50   ; 3.089 ; 3.089 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[0]     ; CLOCK_50   ; 2.837 ; 2.837 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[1]     ; CLOCK_50   ; 3.089 ; 3.089 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[2]     ; CLOCK_50   ; 3.059 ; 3.059 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[3]     ; CLOCK_50   ; 2.807 ; 2.807 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[4]     ; CLOCK_50   ; 2.807 ; 2.807 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[5]     ; CLOCK_50   ; 2.963 ; 2.963 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; AUD_XCK      ; CLOCK_27   ; 1.463 ;       ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SCLK     ; CLOCK_27   ; 2.539 ; 2.539 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SDAT     ; CLOCK_27   ; 2.623 ; 2.623 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; AUD_XCK      ; CLOCK_27   ;       ; 1.463 ; Fall       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                     ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; AUD_DACDAT   ; AUD_BCLK   ; 3.794 ; 3.794 ; Fall       ; AUD_BCLK                                            ;
; LCD_DATA[*]  ; CLOCK_50   ; 2.871 ; 2.871 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[0] ; CLOCK_50   ; 2.997 ; 2.997 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[1] ; CLOCK_50   ; 3.113 ; 3.113 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[2] ; CLOCK_50   ; 3.285 ; 3.285 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[3] ; CLOCK_50   ; 2.946 ; 2.946 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[4] ; CLOCK_50   ; 3.571 ; 3.571 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[5] ; CLOCK_50   ; 2.871 ; 2.871 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[6] ; CLOCK_50   ; 3.422 ; 3.422 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[7] ; CLOCK_50   ; 3.108 ; 3.108 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_EN       ; CLOCK_50   ; 3.750 ; 3.750 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_RS       ; CLOCK_50   ; 2.779 ; 2.779 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX0[*]      ; CLOCK_50   ; 2.957 ; 2.957 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[2]     ; CLOCK_50   ; 3.019 ; 3.019 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[3]     ; CLOCK_50   ; 3.309 ; 3.309 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[4]     ; CLOCK_50   ; 3.122 ; 3.122 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[5]     ; CLOCK_50   ; 3.015 ; 3.015 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[6]     ; CLOCK_50   ; 2.957 ; 2.957 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX1[*]      ; CLOCK_50   ; 2.775 ; 2.775 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[1]     ; CLOCK_50   ; 2.876 ; 2.876 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[2]     ; CLOCK_50   ; 2.775 ; 2.775 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[3]     ; CLOCK_50   ; 3.456 ; 3.456 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[4]     ; CLOCK_50   ; 3.117 ; 3.117 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[6]     ; CLOCK_50   ; 3.464 ; 3.464 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX2[*]      ; CLOCK_50   ; 2.392 ; 2.392 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[0]     ; CLOCK_50   ; 2.646 ; 2.646 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[1]     ; CLOCK_50   ; 2.617 ; 2.617 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[2]     ; CLOCK_50   ; 2.670 ; 2.670 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[3]     ; CLOCK_50   ; 2.662 ; 2.662 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[4]     ; CLOCK_50   ; 2.392 ; 2.392 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[5]     ; CLOCK_50   ; 2.657 ; 2.657 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[6]     ; CLOCK_50   ; 2.637 ; 2.637 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX3[*]      ; CLOCK_50   ; 2.467 ; 2.467 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[0]     ; CLOCK_50   ; 2.716 ; 2.716 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[1]     ; CLOCK_50   ; 2.673 ; 2.673 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[2]     ; CLOCK_50   ; 2.501 ; 2.501 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[3]     ; CLOCK_50   ; 2.522 ; 2.522 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[4]     ; CLOCK_50   ; 2.481 ; 2.481 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[5]     ; CLOCK_50   ; 2.509 ; 2.509 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[6]     ; CLOCK_50   ; 2.467 ; 2.467 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX4[*]      ; CLOCK_50   ; 2.947 ; 2.947 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX4[6]     ; CLOCK_50   ; 2.947 ; 2.947 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX6[*]      ; CLOCK_50   ; 2.202 ; 2.202 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[0]     ; CLOCK_50   ; 2.493 ; 2.493 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[1]     ; CLOCK_50   ; 2.465 ; 2.465 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[2]     ; CLOCK_50   ; 2.202 ; 2.202 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[3]     ; CLOCK_50   ; 2.565 ; 2.565 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[4]     ; CLOCK_50   ; 2.783 ; 2.783 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[5]     ; CLOCK_50   ; 2.856 ; 2.856 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[6]     ; CLOCK_50   ; 2.601 ; 2.601 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX7[*]      ; CLOCK_50   ; 2.807 ; 2.807 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[0]     ; CLOCK_50   ; 2.837 ; 2.837 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[1]     ; CLOCK_50   ; 3.089 ; 3.089 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[2]     ; CLOCK_50   ; 3.059 ; 3.059 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[3]     ; CLOCK_50   ; 2.807 ; 2.807 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[4]     ; CLOCK_50   ; 2.807 ; 2.807 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[5]     ; CLOCK_50   ; 2.963 ; 2.963 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; AUD_XCK      ; CLOCK_27   ; 1.463 ;       ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SCLK     ; CLOCK_27   ; 2.539 ; 2.539 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SDAT     ; CLOCK_27   ; 2.623 ; 2.623 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; AUD_XCK      ; CLOCK_27   ;       ; 1.463 ; Fall       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+


+----------------------------------------------------+
; Propagation Delay                                  ;
+------------+-------------+----+-------+-------+----+
; Input Port ; Output Port ; RR ; RF    ; FR    ; FF ;
+------------+-------------+----+-------+-------+----+
; SW[0]      ; AUD_DACDAT  ;    ; 3.805 ; 3.805 ;    ;
+------------+-------------+----+-------+-------+----+


+----------------------------------------------------+
; Minimum Propagation Delay                          ;
+------------+-------------+----+-------+-------+----+
; Input Port ; Output Port ; RR ; RF    ; FR    ; FF ;
+------------+-------------+----+-------+-------+----+
; SW[0]      ; AUD_DACDAT  ;    ; 3.805 ; 3.805 ;    ;
+------------+-------------+----+-------+-------+----+


+----------------------------------------------------------------------------------------------------------+
; Output Enable Times                                                                                      ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+
; Data Port ; Clock Port ; Rise  ; Fall ; Clock Edge ; Clock Reference                                     ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+
; I2C_SDAT  ; CLOCK_27   ; 2.666 ;      ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+


+----------------------------------------------------------------------------------------------------------+
; Minimum Output Enable Times                                                                              ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+
; Data Port ; Clock Port ; Rise  ; Fall ; Clock Edge ; Clock Reference                                     ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+
; I2C_SDAT  ; CLOCK_27   ; 2.666 ;      ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-----------+------------+-------+------+------------+-----------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------+
; Output Disable Times                                                                                              ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+
; Data Port ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                     ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+
; I2C_SDAT  ; CLOCK_27   ; 2.666     ;           ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------+
; Minimum Output Disable Times                                                                                      ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+
; Data Port ; Clock Port ; 0 to Hi-Z ; 1 to Hi-Z ; Clock Edge ; Clock Reference                                     ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+
; I2C_SDAT  ; CLOCK_27   ; 2.666     ;           ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-----------+------------+-----------+-----------+------------+-----------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------+
; Multicorner Timing Analysis Summary                                                                                      ;
+---------------------------------------------------------+-----------+---------+----------+---------+---------------------+
; Clock                                                   ; Setup     ; Hold    ; Recovery ; Removal ; Minimum Pulse Width ;
+---------------------------------------------------------+-----------+---------+----------+---------+---------------------+
; Worst-case Slack                                        ; -5.751    ; -1.332  ; 2.749    ; 3.522   ; -1.222              ;
;  AUD_BCLK                                               ; -2.252    ; 0.150   ; N/A      ; N/A     ; -1.222              ;
;  CLOCK_27                                               ; 32.777    ; 0.215   ; N/A      ; N/A     ; 17.518              ;
;  CLOCK_50                                               ; N/A       ; N/A     ; N/A      ; N/A     ; 10.000              ;
;  audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.991     ; -1.332  ; N/A      ; N/A     ; -0.500              ;
;  audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 1.365     ; -1.173  ; N/A      ; N/A     ; -0.500              ;
;  clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; -5.751    ; -0.173  ; N/A      ; N/A     ; 7.981               ;
;  clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 97.374    ; 0.215   ; N/A      ; N/A     ; 49.000              ;
;  clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; -2.085    ; 0.215   ; 2.749    ; 3.522   ; 40.666              ;
; Design-wide TNS                                         ; -1490.791 ; -39.788 ; 0.0      ; 0.0     ; -190.222            ;
;  AUD_BCLK                                               ; -263.272  ; 0.000   ; N/A      ; N/A     ; -142.222            ;
;  CLOCK_27                                               ; 0.000     ; 0.000   ; N/A      ; N/A     ; 0.000               ;
;  CLOCK_50                                               ; N/A       ; N/A     ; N/A      ; N/A     ; 0.000               ;
;  audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 0.000     ; -18.156 ; N/A      ; N/A     ; -24.000             ;
;  audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 0.000     ; -21.550 ; N/A      ; N/A     ; -24.000             ;
;  clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; -1184.272 ; -0.328  ; N/A      ; N/A     ; 0.000               ;
;  clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 0.000     ; 0.000   ; N/A      ; N/A     ; 0.000               ;
;  clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; -43.247   ; 0.000   ; 0.000    ; 0.000   ; 0.000               ;
+---------------------------------------------------------+-----------+---------+----------+---------+---------------------+


+---------------------------------------------------------------------------------------------------------------+
; Setup Times                                                                                                   ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; Data Port   ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                     ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; AUD_ADCDAT  ; AUD_BCLK   ; 3.859  ; 3.859  ; Rise       ; AUD_BCLK                                            ;
; AUD_ADCLRCK ; AUD_BCLK   ; 5.843  ; 5.843  ; Rise       ; AUD_BCLK                                            ;
; AUD_DACLRCK ; AUD_BCLK   ; 5.069  ; 5.069  ; Fall       ; AUD_BCLK                                            ;
; SW[*]       ; CLOCK_27   ; 5.450  ; 5.450  ; Rise       ; CLOCK_27                                            ;
;  SW[17]     ; CLOCK_27   ; 5.450  ; 5.450  ; Rise       ; CLOCK_27                                            ;
; KEY[*]      ; CLOCK_50   ; 11.218 ; 11.218 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[0]     ; CLOCK_50   ; 10.487 ; 10.487 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[1]     ; CLOCK_50   ; 11.218 ; 11.218 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[2]     ; CLOCK_50   ; 9.152  ; 9.152  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[3]     ; CLOCK_50   ; 9.400  ; 9.400  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; 5.334  ; 5.334  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[2]      ; CLOCK_50   ; 3.895  ; 3.895  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[3]      ; CLOCK_50   ; 5.334  ; 5.334  ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; 4.231  ; 4.231  ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[1]      ; CLOCK_50   ; 4.231  ; 4.231  ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; I2C_SDAT    ; CLOCK_27   ; 7.522  ; 7.522  ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------+
; Hold Times                                                                                                    ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; Data Port   ; Clock Port ; Rise   ; Fall   ; Clock Edge ; Clock Reference                                     ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+
; AUD_ADCDAT  ; AUD_BCLK   ; -1.877 ; -1.877 ; Rise       ; AUD_BCLK                                            ;
; AUD_ADCLRCK ; AUD_BCLK   ; -2.147 ; -2.147 ; Rise       ; AUD_BCLK                                            ;
; AUD_DACLRCK ; AUD_BCLK   ; -1.889 ; -1.889 ; Fall       ; AUD_BCLK                                            ;
; SW[*]       ; CLOCK_27   ; -2.489 ; -2.489 ; Rise       ; CLOCK_27                                            ;
;  SW[17]     ; CLOCK_27   ; -2.489 ; -2.489 ; Rise       ; CLOCK_27                                            ;
; KEY[*]      ; CLOCK_50   ; -3.920 ; -3.920 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[0]     ; CLOCK_50   ; -4.166 ; -4.166 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[1]     ; CLOCK_50   ; -4.027 ; -4.027 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[2]     ; CLOCK_50   ; -3.920 ; -3.920 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  KEY[3]     ; CLOCK_50   ; -4.149 ; -4.149 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; -1.274 ; -1.274 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[2]      ; CLOCK_50   ; -1.274 ; -1.274 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[3]      ; CLOCK_50   ; -1.302 ; -1.302 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; SW[*]       ; CLOCK_50   ; -1.230 ; -1.230 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  SW[1]      ; CLOCK_50   ; -1.230 ; -1.230 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; I2C_SDAT    ; CLOCK_27   ; -3.845 ; -3.845 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+-------------+------------+--------+--------+------------+-----------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------+
; Clock to Output Times                                                                                        ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                     ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; AUD_DACDAT   ; AUD_BCLK   ; 7.057 ; 7.057 ; Fall       ; AUD_BCLK                                            ;
; LCD_DATA[*]  ; CLOCK_50   ; 6.954 ; 6.954 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[0] ; CLOCK_50   ; 5.971 ; 5.971 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[1] ; CLOCK_50   ; 6.297 ; 6.297 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[2] ; CLOCK_50   ; 6.561 ; 6.561 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[3] ; CLOCK_50   ; 5.803 ; 5.803 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[4] ; CLOCK_50   ; 6.954 ; 6.954 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[5] ; CLOCK_50   ; 5.620 ; 5.620 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[6] ; CLOCK_50   ; 6.641 ; 6.641 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[7] ; CLOCK_50   ; 6.120 ; 6.120 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_EN       ; CLOCK_50   ; 7.748 ; 7.748 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_RS       ; CLOCK_50   ; 5.490 ; 5.490 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX0[*]      ; CLOCK_50   ; 6.427 ; 6.427 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[2]     ; CLOCK_50   ; 6.084 ; 6.084 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[3]     ; CLOCK_50   ; 6.427 ; 6.427 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[4]     ; CLOCK_50   ; 6.262 ; 6.262 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[5]     ; CLOCK_50   ; 6.085 ; 6.085 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[6]     ; CLOCK_50   ; 5.862 ; 5.862 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX1[*]      ; CLOCK_50   ; 7.155 ; 7.155 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[1]     ; CLOCK_50   ; 5.770 ; 5.770 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[2]     ; CLOCK_50   ; 5.690 ; 5.690 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[3]     ; CLOCK_50   ; 7.154 ; 7.154 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[4]     ; CLOCK_50   ; 6.269 ; 6.269 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[6]     ; CLOCK_50   ; 7.155 ; 7.155 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX2[*]      ; CLOCK_50   ; 5.421 ; 5.421 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[0]     ; CLOCK_50   ; 5.389 ; 5.389 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[1]     ; CLOCK_50   ; 5.320 ; 5.320 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[2]     ; CLOCK_50   ; 5.421 ; 5.421 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[3]     ; CLOCK_50   ; 5.403 ; 5.403 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[4]     ; CLOCK_50   ; 4.762 ; 4.762 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[5]     ; CLOCK_50   ; 5.413 ; 5.413 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[6]     ; CLOCK_50   ; 5.383 ; 5.383 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX3[*]      ; CLOCK_50   ; 5.598 ; 5.598 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[0]     ; CLOCK_50   ; 5.598 ; 5.598 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[1]     ; CLOCK_50   ; 5.442 ; 5.442 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[2]     ; CLOCK_50   ; 5.092 ; 5.092 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[3]     ; CLOCK_50   ; 5.126 ; 5.126 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[4]     ; CLOCK_50   ; 5.011 ; 5.011 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[5]     ; CLOCK_50   ; 5.115 ; 5.115 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[6]     ; CLOCK_50   ; 5.045 ; 5.045 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX4[*]      ; CLOCK_50   ; 5.782 ; 5.782 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX4[6]     ; CLOCK_50   ; 5.782 ; 5.782 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX6[*]      ; CLOCK_50   ; 5.833 ; 5.833 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[0]     ; CLOCK_50   ; 5.076 ; 5.076 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[1]     ; CLOCK_50   ; 4.986 ; 4.986 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[2]     ; CLOCK_50   ; 4.362 ; 4.362 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[3]     ; CLOCK_50   ; 5.080 ; 5.080 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[4]     ; CLOCK_50   ; 5.637 ; 5.637 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[5]     ; CLOCK_50   ; 5.833 ; 5.833 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[6]     ; CLOCK_50   ; 5.200 ; 5.200 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX7[*]      ; CLOCK_50   ; 6.193 ; 6.193 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[0]     ; CLOCK_50   ; 5.695 ; 5.695 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[1]     ; CLOCK_50   ; 6.193 ; 6.193 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[2]     ; CLOCK_50   ; 6.163 ; 6.163 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[3]     ; CLOCK_50   ; 5.665 ; 5.665 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[4]     ; CLOCK_50   ; 5.665 ; 5.665 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[5]     ; CLOCK_50   ; 5.977 ; 5.977 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; AUD_XCK      ; CLOCK_27   ; 2.917 ;       ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SCLK     ; CLOCK_27   ; 5.014 ; 5.014 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SDAT     ; CLOCK_27   ; 5.223 ; 5.223 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; AUD_XCK      ; CLOCK_27   ;       ; 2.917 ; Fall       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------+
; Minimum Clock to Output Times                                                                                ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; Data Port    ; Clock Port ; Rise  ; Fall  ; Clock Edge ; Clock Reference                                     ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+
; AUD_DACDAT   ; AUD_BCLK   ; 3.794 ; 3.794 ; Fall       ; AUD_BCLK                                            ;
; LCD_DATA[*]  ; CLOCK_50   ; 2.871 ; 2.871 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[0] ; CLOCK_50   ; 2.997 ; 2.997 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[1] ; CLOCK_50   ; 3.113 ; 3.113 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[2] ; CLOCK_50   ; 3.285 ; 3.285 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[3] ; CLOCK_50   ; 2.946 ; 2.946 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[4] ; CLOCK_50   ; 3.571 ; 3.571 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[5] ; CLOCK_50   ; 2.871 ; 2.871 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[6] ; CLOCK_50   ; 3.422 ; 3.422 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  LCD_DATA[7] ; CLOCK_50   ; 3.108 ; 3.108 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_EN       ; CLOCK_50   ; 3.750 ; 3.750 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; LCD_RS       ; CLOCK_50   ; 2.779 ; 2.779 ; Rise       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX0[*]      ; CLOCK_50   ; 2.957 ; 2.957 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[2]     ; CLOCK_50   ; 3.019 ; 3.019 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[3]     ; CLOCK_50   ; 3.309 ; 3.309 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[4]     ; CLOCK_50   ; 3.122 ; 3.122 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[5]     ; CLOCK_50   ; 3.015 ; 3.015 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX0[6]     ; CLOCK_50   ; 2.957 ; 2.957 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX1[*]      ; CLOCK_50   ; 2.775 ; 2.775 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[1]     ; CLOCK_50   ; 2.876 ; 2.876 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[2]     ; CLOCK_50   ; 2.775 ; 2.775 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[3]     ; CLOCK_50   ; 3.456 ; 3.456 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[4]     ; CLOCK_50   ; 3.117 ; 3.117 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX1[6]     ; CLOCK_50   ; 3.464 ; 3.464 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX2[*]      ; CLOCK_50   ; 2.392 ; 2.392 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[0]     ; CLOCK_50   ; 2.646 ; 2.646 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[1]     ; CLOCK_50   ; 2.617 ; 2.617 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[2]     ; CLOCK_50   ; 2.670 ; 2.670 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[3]     ; CLOCK_50   ; 2.662 ; 2.662 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[4]     ; CLOCK_50   ; 2.392 ; 2.392 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[5]     ; CLOCK_50   ; 2.657 ; 2.657 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX2[6]     ; CLOCK_50   ; 2.637 ; 2.637 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX3[*]      ; CLOCK_50   ; 2.467 ; 2.467 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[0]     ; CLOCK_50   ; 2.716 ; 2.716 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[1]     ; CLOCK_50   ; 2.673 ; 2.673 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[2]     ; CLOCK_50   ; 2.501 ; 2.501 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[3]     ; CLOCK_50   ; 2.522 ; 2.522 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[4]     ; CLOCK_50   ; 2.481 ; 2.481 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[5]     ; CLOCK_50   ; 2.509 ; 2.509 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX3[6]     ; CLOCK_50   ; 2.467 ; 2.467 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX4[*]      ; CLOCK_50   ; 2.947 ; 2.947 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX4[6]     ; CLOCK_50   ; 2.947 ; 2.947 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX6[*]      ; CLOCK_50   ; 2.202 ; 2.202 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[0]     ; CLOCK_50   ; 2.493 ; 2.493 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[1]     ; CLOCK_50   ; 2.465 ; 2.465 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[2]     ; CLOCK_50   ; 2.202 ; 2.202 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[3]     ; CLOCK_50   ; 2.565 ; 2.565 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[4]     ; CLOCK_50   ; 2.783 ; 2.783 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[5]     ; CLOCK_50   ; 2.856 ; 2.856 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX6[6]     ; CLOCK_50   ; 2.601 ; 2.601 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; HEX7[*]      ; CLOCK_50   ; 2.807 ; 2.807 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[0]     ; CLOCK_50   ; 2.837 ; 2.837 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[1]     ; CLOCK_50   ; 3.089 ; 3.089 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[2]     ; CLOCK_50   ; 3.059 ; 3.059 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[3]     ; CLOCK_50   ; 2.807 ; 2.807 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[4]     ; CLOCK_50   ; 2.807 ; 2.807 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
;  HEX7[5]     ; CLOCK_50   ; 2.963 ; 2.963 ; Fall       ; clock_generator_1|pll_1|altpll_component|pll|clk[0] ;
; AUD_XCK      ; CLOCK_27   ; 1.463 ;       ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SCLK     ; CLOCK_27   ; 2.539 ; 2.539 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; I2C_SDAT     ; CLOCK_27   ; 2.623 ; 2.623 ; Rise       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
; AUD_XCK      ; CLOCK_27   ;       ; 1.463 ; Fall       ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ;
+--------------+------------+-------+-------+------------+-----------------------------------------------------+


+----------------------------------------------------+
; Progagation Delay                                  ;
+------------+-------------+----+-------+-------+----+
; Input Port ; Output Port ; RR ; RF    ; FR    ; FF ;
+------------+-------------+----+-------+-------+----+
; SW[0]      ; AUD_DACDAT  ;    ; 7.122 ; 7.122 ;    ;
+------------+-------------+----+-------+-------+----+


+----------------------------------------------------+
; Minimum Progagation Delay                          ;
+------------+-------------+----+-------+-------+----+
; Input Port ; Output Port ; RR ; RF    ; FR    ; FF ;
+------------+-------------+----+-------+-------+----+
; SW[0]      ; AUD_DACDAT  ;    ; 3.805 ; 3.805 ;    ;
+------------+-------------+----+-------+-------+----+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Setup Transfers                                                                                                                                                 ;
+--------------------------------------------------------+--------------------------------------------------------+--------------+----------+----------+----------+
; From Clock                                             ; To Clock                                               ; RR Paths     ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------+--------------------------------------------------------+--------------+----------+----------+----------+
; AUD_BCLK                                               ; AUD_BCLK                                               ; 1101         ; 0        ; 0        ; 475      ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK                                               ; 0            ; 0        ; 24       ; 0        ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK                                               ; 0            ; 0        ; 24       ; 0        ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 24           ; 0        ; 0        ; 0        ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 24           ; 0        ; 0        ; 0        ;
; CLOCK_27                                               ; CLOCK_27                                               ; 1053         ; 0        ; 0        ; 0        ;
; AUD_BCLK                                               ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 72           ; 0        ; 0        ; 0        ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 1            ; 1        ; 0        ; 0        ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 1            ; 1        ; 0        ; 0        ;
; CLOCK_27                                               ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 234          ; 0        ; 0        ; 0        ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; > 2147483647 ; 26       ; 23159    ; 895      ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 73           ; 0        ; 0        ; 0        ;
; CLOCK_27                                               ; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 6            ; 0        ; 0        ; 0        ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 24           ; 0        ; 0        ; 0        ;
; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 236          ; 0        ; 0        ; 0        ;
+--------------------------------------------------------+--------------------------------------------------------+--------------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Hold Transfers                                                                                                                                                  ;
+--------------------------------------------------------+--------------------------------------------------------+--------------+----------+----------+----------+
; From Clock                                             ; To Clock                                               ; RR Paths     ; FR Paths ; RF Paths ; FF Paths ;
+--------------------------------------------------------+--------------------------------------------------------+--------------+----------+----------+----------+
; AUD_BCLK                                               ; AUD_BCLK                                               ; 1101         ; 0        ; 0        ; 475      ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; AUD_BCLK                                               ; 0            ; 0        ; 24       ; 0        ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; AUD_BCLK                                               ; 0            ; 0        ; 24       ; 0        ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; 24           ; 0        ; 0        ; 0        ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; 24           ; 0        ; 0        ; 0        ;
; CLOCK_27                                               ; CLOCK_27                                               ; 1053         ; 0        ; 0        ; 0        ;
; AUD_BCLK                                               ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 72           ; 0        ; 0        ; 0        ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 1            ; 1        ; 0        ; 0        ;
; audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 1            ; 1        ; 0        ; 0        ;
; CLOCK_27                                               ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; 234          ; 0        ; 0        ; 0        ;
; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; clock_generator_1|pll_1|altpll_component|pll|clk[0]    ; > 2147483647 ; 26       ; 23159    ; 895      ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; 73           ; 0        ; 0        ; 0        ;
; CLOCK_27                                               ; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 6            ; 0        ; 0        ; 0        ;
; clock_generator_1|pll_1|altpll_component|pll|clk[1]    ; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 24           ; 0        ; 0        ; 0        ;
; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; clock_generator_1|pll_2|altpll_component|pll|clk[1]    ; 236          ; 0        ; 0        ; 0        ;
+--------------------------------------------------------+--------------------------------------------------------+--------------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+--------------------------------------------------------------------------------------------------------------+
; Recovery Transfers                                                                                           ;
+------------+-----------------------------------------------------+----------+----------+----------+----------+
; From Clock ; To Clock                                            ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+------------+-----------------------------------------------------+----------+----------+----------+----------+
; CLOCK_27   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 18       ; 0        ; 0        ; 0        ;
+------------+-----------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


+--------------------------------------------------------------------------------------------------------------+
; Removal Transfers                                                                                            ;
+------------+-----------------------------------------------------+----------+----------+----------+----------+
; From Clock ; To Clock                                            ; RR Paths ; FR Paths ; RF Paths ; FF Paths ;
+------------+-----------------------------------------------------+----------+----------+----------+----------+
; CLOCK_27   ; clock_generator_1|pll_2|altpll_component|pll|clk[1] ; 18       ; 0        ; 0        ; 0        ;
+------------+-----------------------------------------------------+----------+----------+----------+----------+
Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported.


---------------
; Report TCCS ;
---------------
No dedicated SERDES Transmitter circuitry present in device or used in design


---------------
; Report RSKM ;
---------------
No dedicated SERDES Receiver circuitry present in device or used in design


+------------------------------------------------+
; Unconstrained Paths                            ;
+---------------------------------+-------+------+
; Property                        ; Setup ; Hold ;
+---------------------------------+-------+------+
; Illegal Clocks                  ; 0     ; 0    ;
; Unconstrained Clocks            ; 0     ; 0    ;
; Unconstrained Input Ports       ; 13    ; 13   ;
; Unconstrained Input Port Paths  ; 607   ; 607  ;
; Unconstrained Output Ports      ; 52    ; 52   ;
; Unconstrained Output Port Paths ; 54    ; 54   ;
+---------------------------------+-------+------+


+------------------------------------+
; TimeQuest Timing Analyzer Messages ;
+------------------------------------+
Info: *******************************************************************
Info: Running Quartus II 64-Bit TimeQuest Timing Analyzer
    Info: Version 11.1 Build 173 11/01/2011 SJ Full Version
    Info: Processing started: Wed Jul 11 18:16:52 2012
Info: Command: quartus_sta Equalizer -c Equalizer
Info: qsta_default_script.tcl version: #1
Warning (20028): Parallel compilation is not licensed and has been disabled
Info (21077): Low junction temperature is 0 degrees C
Info (21077): High junction temperature is 85 degrees C
Critical Warning (332012): Synopsys Design Constraints File file not found: 'Equalizer.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design.
Info (332142): No user constrained generated clocks found in the design. Calling "derive_pll_clocks -create_base_clocks"
Info (332110): Deriving PLL Clocks
    Info (332110): create_clock -period 37.037 -waveform {0.000 18.518} -name CLOCK_27 CLOCK_27
    Info (332110): create_clock -period 20.000 -waveform {0.000 10.000} -name CLOCK_50 CLOCK_50
    Info (332110): create_generated_clock -source {clock_generator_1|pll_1|altpll_component|pll|inclk[0]} -duty_cycle 50.00 -name {clock_generator_1|pll_1|altpll_component|pll|clk[0]} {clock_generator_1|pll_1|altpll_component|pll|clk[0]}
    Info (332110): create_generated_clock -source {clock_generator_1|pll_1|altpll_component|pll|inclk[0]} -divide_by 5 -duty_cycle 50.00 -name {clock_generator_1|pll_1|altpll_component|pll|clk[1]} {clock_generator_1|pll_1|altpll_component|pll|clk[1]}
    Info (332110): create_generated_clock -source {clock_generator_1|pll_2|altpll_component|pll|inclk[0]} -divide_by 9 -multiply_by 4 -duty_cycle 50.00 -name {clock_generator_1|pll_2|altpll_component|pll|clk[1]} {clock_generator_1|pll_2|altpll_component|pll|clk[1]}
Info (332142): No user constrained base clocks found in the design. Calling "derive_clocks -period 1.0"
Info (332105): Deriving Clocks
    Info (332105): create_clock -period 1.000 -name AUD_BCLK AUD_BCLK
    Info (332105): create_clock -period 1.000 -name audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr
    Info (332105): create_clock -period 1.000 -name audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql
Info: Found TIMEQUEST_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON
Info: Analyzing Slow Model
Warning (332009): The launch and latch times for the relationship between source clock: clock_generator_1|pll_1|altpll_component|pll|clk[1] and destination clock: clock_generator_1|pll_2|altpll_component|pll|clk[1] are outside of the legal time range. The relationship difference is correct, however the launch time is set to 0.
Critical Warning (332148): Timing requirements not met
Info (332146): Worst-case setup slack is -5.751
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -5.751     -1184.272 clock_generator_1|pll_1|altpll_component|pll|clk[0] 
    Info (332119):    -2.252      -263.272 AUD_BCLK 
    Info (332119):    -2.085       -43.247 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
    Info (332119):     0.991         0.000 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql 
    Info (332119):     1.365         0.000 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr 
    Info (332119):    32.777         0.000 CLOCK_27 
    Info (332119):    97.374         0.000 clock_generator_1|pll_1|altpll_component|pll|clk[1] 
Info (332146): Worst-case hold slack is -1.332
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -1.332       -17.910 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql 
    Info (332119):    -1.173       -21.550 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr 
    Info (332119):    -0.173        -0.328 clock_generator_1|pll_1|altpll_component|pll|clk[0] 
    Info (332119):     0.316         0.000 AUD_BCLK 
    Info (332119):     0.391         0.000 CLOCK_27 
    Info (332119):     0.391         0.000 clock_generator_1|pll_1|altpll_component|pll|clk[1] 
    Info (332119):     0.391         0.000 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
Info (332146): Worst-case recovery slack is 2.749
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     2.749         0.000 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
Info (332146): Worst-case removal slack is 6.040
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     6.040         0.000 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
Info (332146): Worst-case minimum pulse width slack is -1.222
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -1.222      -142.222 AUD_BCLK 
    Info (332119):    -0.500       -24.000 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql 
    Info (332119):    -0.500       -24.000 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr 
    Info (332119):     8.077         0.000 clock_generator_1|pll_1|altpll_component|pll|clk[0] 
    Info (332119):    10.000         0.000 CLOCK_50 
    Info (332119):    17.518         0.000 CLOCK_27 
    Info (332119):    40.666         0.000 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
    Info (332119):    49.000         0.000 clock_generator_1|pll_1|altpll_component|pll|clk[1] 
Info (332001): The selected device family is not supported by the report_metastability command.
Info: Analyzing Fast Model
Warning (332009): The launch and latch times for the relationship between source clock: clock_generator_1|pll_1|altpll_component|pll|clk[1] and destination clock: clock_generator_1|pll_2|altpll_component|pll|clk[1] are outside of the legal time range. The relationship difference is correct, however the launch time is set to 0.
Critical Warning (332148): Timing requirements not met
Info (332146): Worst-case setup slack is -3.281
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -3.281      -638.963 clock_generator_1|pll_1|altpll_component|pll|clk[0] 
    Info (332119):    -1.038       -21.810 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
    Info (332119):    -0.572       -50.909 AUD_BCLK 
    Info (332119):     1.388         0.000 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql 
    Info (332119):     1.582         0.000 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr 
    Info (332119):    35.033         0.000 CLOCK_27 
    Info (332119):    98.827         0.000 clock_generator_1|pll_1|altpll_component|pll|clk[1] 
Info (332146): Worst-case hold slack is -1.012
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -1.012       -18.156 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql 
    Info (332119):    -0.973       -20.345 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr 
    Info (332119):     0.007         0.000 clock_generator_1|pll_1|altpll_component|pll|clk[0] 
    Info (332119):     0.150         0.000 AUD_BCLK 
    Info (332119):     0.215         0.000 CLOCK_27 
    Info (332119):     0.215         0.000 clock_generator_1|pll_1|altpll_component|pll|clk[1] 
    Info (332119):     0.215         0.000 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
Info (332146): Worst-case recovery slack is 5.507
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     5.507         0.000 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
Info (332146): Worst-case removal slack is 3.522
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):     3.522         0.000 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
Info (332146): Worst-case minimum pulse width slack is -1.222
    Info (332119):     Slack End Point TNS Clock 
    Info (332119): ========= ============= =====================
    Info (332119):    -1.222      -142.222 AUD_BCLK 
    Info (332119):    -0.500       -24.000 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enql 
    Info (332119):    -0.500       -24.000 audio_unit:audio_unit_1|filter_unit:filter_unit_1|enqr 
    Info (332119):     7.981         0.000 clock_generator_1|pll_1|altpll_component|pll|clk[0] 
    Info (332119):    10.000         0.000 CLOCK_50 
    Info (332119):    17.518         0.000 CLOCK_27 
    Info (332119):    40.666         0.000 clock_generator_1|pll_2|altpll_component|pll|clk[1] 
    Info (332119):    49.000         0.000 clock_generator_1|pll_1|altpll_component|pll|clk[1] 
Info (332001): The selected device family is not supported by the report_metastability command.
Warning (332009): The launch and latch times for the relationship between source clock: clock_generator_1|pll_1|altpll_component|pll|clk[1] and destination clock: clock_generator_1|pll_2|altpll_component|pll|clk[1] are outside of the legal time range. The relationship difference is correct, however the launch time is set to 0.
Info (332102): Design is not fully constrained for setup requirements
Info (332102): Design is not fully constrained for hold requirements
Info: Quartus II 64-Bit TimeQuest Timing Analyzer was successful. 0 errors, 7 warnings
    Info: Peak virtual memory: 521 megabytes
    Info: Processing ended: Wed Jul 11 18:17:02 2012
    Info: Elapsed time: 00:00:10
    Info: Total CPU time (on all processors): 00:00:09


