Index of /Programmierbare Logik/APL/Dokumentation/Juergen

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[PARENTDIR]Parent Directory  -  
[ ]mmi_controller.vhd2022-12-24 02:16 24K 
[TXT]mmi.tex2022-12-24 02:16 3.6K 
[ ]missfont.log2022-12-24 02:16 654  
[IMG]master_mode.jpg2022-12-24 02:16 60K 
[ ]lpm_mult_volume_inst.vhd2022-12-24 02:16 129  
[ ]lpm_mult_volume.vhd2022-12-24 02:16 4.9K 
[ ]lpm_mult0_inst.vhd2022-12-24 02:16 117  
[ ]lpm_mult0.vhd2022-12-24 02:16 4.8K 
[ ]lpm_div0_inst.vhd2022-12-24 02:16 145  
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[IMG]left_justified_mode.jpg2022-12-24 02:16 52K 
[ ]lcd_controller.vhd2022-12-24 02:16 6.2K 
[ ]iir_mul_add.vhd2022-12-24 02:16 19K 
[ ]iir.vhd2022-12-24 02:16 15K 
[ ]i2c_master.vhd2022-12-24 02:16 7.5K 
[IMG]i2c_master.jpg2022-12-24 02:16 135K 
[ ]filter_unit.vhd2022-12-24 02:16 16K 
[ ]filter_arithmetic_unit.vhd2022-12-24 02:16 1.0K 
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[TXT]eq.tex.aux2022-12-24 02:17 762  
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[ ]eq.log2022-12-24 02:17 201K 
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[ ]doc.zip2022-12-24 02:17 5.5M 
[ ]doc.toc2022-12-24 02:17 2.8K 
[TXT]doc.tex2022-12-24 02:17 63K 
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[ ]db2linear.vhd2022-12-24 02:17 3.6K 
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[ ]coeff_sub_inst.vhd2022-12-24 02:17 117  
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[ ]coeff_mul_inst.vhd2022-12-24 02:17 117  
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[ ]coeff_add_inst.vhd2022-12-24 02:17 117  
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[ ]audio_unit.vhd2022-12-24 02:17 9.1K 
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[ ]audio_output_register.vhd2022-12-24 02:17 3.5K 
[ ]audio_input_register.vhd2022-12-24 02:17 3.1K 
[ ]WM8731.pdf2022-12-24 02:16 807K 
[IMG]MMI_MMI_1.jpg2022-12-24 02:16 350K 
[ ]MMI.vhd2022-12-24 02:16 9.5K 
[IMG]IIR_Filter_PAP.jpg2022-12-24 02:16 98K 
[ ]IIR_Filter_PAP.graphml2022-12-24 02:16 22K 
[IMG]Filter14_gemessen.jpg2022-12-24 02:16 191K 
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[IMG]Filter13_gemessen.jpg2022-12-24 02:16 192K 
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[IMG]Filter10_gemessen.jpg2022-12-24 02:16 193K 
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[IMG]Filter2_gemessen.jpg2022-12-24 02:16 193K 
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[IMG]Filter1_gemessen.jpg2022-12-24 02:16 194K 
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[IMG]Filter1_berechnet.jpg2022-12-24 02:16 155K 
[ ]Filter1_berechnet.eps2022-12-24 02:16 31K 
[ ]Filter1_berechnet.ai2022-12-24 02:16 87K 
[IMG]F1_6dB.png2022-12-24 02:17 20K 
[ ]Equalizer.vhd2022-12-24 02:17 12K 
[IMG]Equalizer.jpg2022-12-24 02:17 400K 
[ ]Equalizer2022-12-24 02:17 400K 
[ ]EQ_PLL_50_inst.vhd2022-12-24 02:17 105  
[ ]EQ_PLL_50.vhd2022-12-24 02:17 16K 
[ ]EQ_PLL_27_inst.vhd2022-12-24 02:17 105  
[ ]EQ_PLL_27.vhd2022-12-24 02:17 16K 
[IMG]3-wire.jpg2022-12-24 02:17 49K 
[IMG]2-wire.jpg2022-12-24 02:17 35K 
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